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synced 2025-08-01 02:30:12 -06:00
Refactor NDS
and DSi
to be objects (#1893)
* First crack at refactoring NDS and DSi into objects - Remove all global/`static` variables in `NDS` and related classes - Rely more on virtual dispatch when we need to pick methods at runtime - Pass `NDS&` or `DSi&` to its constituent components where necessary - Introduce some headers or move some definitions to break `#include` cycles * Refactor the frontend to accommodate the core's changes * Move up `SchedList`'s declaration - Move it to before the components are initialized so the `map`s inside are initialized - Fields in C++ are initialized in the order they're declared * Fix a crash when allocating memory * Fix JIT-free builds * Fix GDB-free builds * Fix Linux builds - Explicitly qualify some member types in NDS, since they share the same name as their classes * Remove an unnecessary template argument - This was causing the build to fail on macOS * Fix ARM and Android builds * Rename `Constants.h` to `MemConstants.h` * Add `NDS::IsRunning()` * Use an `#include` guard instead of `#pragma once`
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@ -21,6 +21,7 @@
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#include "../ARMJIT_Internal.h"
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#include "../ARMInterpreter.h"
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#include "../ARMJIT.h"
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#include "../NDS.h"
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#if defined(__SWITCH__)
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#include <switch.h>
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@ -220,7 +221,7 @@ void Compiler::PopRegs(bool saveHiRegs, bool saveRegsToBeChanged)
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}
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}
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Compiler::Compiler(ARMJIT& jit) : Arm64Gen::ARM64XEmitter(), JIT(jit)
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Compiler::Compiler(melonDS::NDS& nds) : Arm64Gen::ARM64XEmitter(), NDS(nds)
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{
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#ifdef __SWITCH__
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JitRWBase = aligned_alloc(0x1000, JitMemSize);
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@ -705,12 +706,12 @@ JitBlockEntry Compiler::CompileBlock(ARM* cpu, bool thumb, FetchedInstr instrs[]
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if (JitMemMainSize - GetCodeOffset() < 1024 * 16)
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{
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Log(LogLevel::Debug, "JIT near memory full, resetting...\n");
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JIT.ResetBlockCache();
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NDS.JIT.ResetBlockCache();
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}
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if ((JitMemMainSize + JitMemSecondarySize) - OtherCodeRegion < 1024 * 8)
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{
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Log(LogLevel::Debug, "JIT far memory full, resetting...\n");
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JIT.ResetBlockCache();
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NDS.JIT.ResetBlockCache();
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}
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JitBlockEntry res = (JitBlockEntry)GetRXPtr();
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@ -723,7 +724,7 @@ JitBlockEntry Compiler::CompileBlock(ARM* cpu, bool thumb, FetchedInstr instrs[]
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CPSRDirty = false;
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if (hasMemInstr)
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MOVP2R(RMemBase, Num == 0 ? JIT.Memory.FastMem9Start : JIT.Memory.FastMem7Start);
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MOVP2R(RMemBase, Num == 0 ? NDS.JIT.Memory.FastMem9Start : NDS.JIT.Memory.FastMem7Start);
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for (int i = 0; i < instrsCount; i++)
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{
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@ -871,7 +872,7 @@ void Compiler::Reset()
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void Compiler::Comp_AddCycles_C(bool forceNonConstant)
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{
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s32 cycles = Num ?
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NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 1 : 3]
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NDS.ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 1 : 3]
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: ((R15 & 0x2) ? 0 : CurInstr.CodeCycles);
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if (forceNonConstant)
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@ -885,7 +886,7 @@ void Compiler::Comp_AddCycles_CI(u32 numI)
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IrregularCycles = true;
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s32 cycles = (Num ?
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NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2]
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NDS.ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2]
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: ((R15 & 0x2) ? 0 : CurInstr.CodeCycles)) + numI;
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if (Thumb || CurInstr.Cond() == 0xE)
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@ -899,7 +900,7 @@ void Compiler::Comp_AddCycles_CI(u32 c, ARM64Reg numI, ArithOption shift)
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IrregularCycles = true;
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s32 cycles = (Num ?
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NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2]
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NDS.ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2]
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: ((R15 & 0x2) ? 0 : CurInstr.CodeCycles)) + c;
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ADD(RCycles, RCycles, cycles);
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@ -919,7 +920,7 @@ void Compiler::Comp_AddCycles_CDI()
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s32 cycles;
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s32 numC = NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2];
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s32 numC = NDS.ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2];
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s32 numD = CurInstr.DataCycles;
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if ((CurInstr.DataRegion >> 24) == 0x02) // mainRAM
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@ -964,7 +965,7 @@ void Compiler::Comp_AddCycles_CD()
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}
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else
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{
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s32 numC = NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2];
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s32 numC = NDS.ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2];
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s32 numD = CurInstr.DataCycles;
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if ((CurInstr.DataRegion >> 24) == 0x02)
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