mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-07-24 14:49:53 -06:00
Refactor NDS
and DSi
to be objects (#1893)
* First crack at refactoring NDS and DSi into objects - Remove all global/`static` variables in `NDS` and related classes - Rely more on virtual dispatch when we need to pick methods at runtime - Pass `NDS&` or `DSi&` to its constituent components where necessary - Introduce some headers or move some definitions to break `#include` cycles * Refactor the frontend to accommodate the core's changes * Move up `SchedList`'s declaration - Move it to before the components are initialized so the `map`s inside are initialized - Fields in C++ are initialized in the order they're declared * Fix a crash when allocating memory * Fix JIT-free builds * Fix GDB-free builds * Fix Linux builds - Explicitly qualify some member types in NDS, since they share the same name as their classes * Remove an unnecessary template argument - This was causing the build to fail on macOS * Fix ARM and Android builds * Rename `Constants.h` to `MemConstants.h` * Add `NDS::IsRunning()` * Use an `#include` guard instead of `#pragma once`
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parent
c84cb17462
commit
e973236203
@ -28,7 +28,7 @@ namespace melonDS
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using Platform::Log;
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using Platform::LogLevel;
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DSi_NDMA::DSi_NDMA(u32 cpu, u32 num, melonDS::GPU& gpu) : GPU(gpu)
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DSi_NDMA::DSi_NDMA(u32 cpu, u32 num, melonDS::DSi& dsi) : DSi(dsi), CPU(cpu), Num(num)
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{
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CPU = cpu;
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Num = num;
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@ -127,7 +127,7 @@ void DSi_NDMA::WriteCnt(u32 val)
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if ((StartMode & 0x1F) == 0x10)
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Start();
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else if (StartMode == 0x0A)
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GPU.GPU3D.CheckFIFODMA();
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DSi.GPU.GPU3D.CheckFIFODMA();
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// TODO: unsupported start modes:
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// * timers (00-03)
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@ -181,13 +181,13 @@ void DSi_NDMA::Start()
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//if (SubblockTimer & 0xFFFF)
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// printf("TODO! NDMA SUBBLOCK TIMER: %08X\n", SubblockTimer);
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if (NDS::DMAsRunning(CPU))
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if (DSi.DMAsRunning(CPU))
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Running = 1;
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else
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Running = 2;
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InProgress = true;
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NDS::StopCPU(CPU, 1<<(Num+4));
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DSi.StopCPU(CPU, 1<<(Num+4));
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}
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void DSi_NDMA::Run()
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@ -199,7 +199,7 @@ void DSi_NDMA::Run()
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void DSi_NDMA::Run9()
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{
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if (NDS::ARM9Timestamp >= NDS::ARM9Target) return;
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if (DSi.ARM9Timestamp >= DSi.ARM9Target) return;
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Executing = true;
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@ -214,11 +214,11 @@ void DSi_NDMA::Run9()
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if ((CurSrcAddr >> 24) == 0x02 && (CurDstAddr >> 24) == 0x02)
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{
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unitcycles = NDS::ARM9MemTimings[CurSrcAddr >> 14][2] + NDS::ARM9MemTimings[CurDstAddr >> 14][2];
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unitcycles = DSi.ARM9MemTimings[CurSrcAddr >> 14][2] + DSi.ARM9MemTimings[CurDstAddr >> 14][2];
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}
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else
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{
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unitcycles = NDS::ARM9MemTimings[CurSrcAddr >> 14][3] + NDS::ARM9MemTimings[CurDstAddr >> 14][3];
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unitcycles = DSi.ARM9MemTimings[CurSrcAddr >> 14][3] + DSi.ARM9MemTimings[CurDstAddr >> 14][3];
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if ((CurSrcAddr >> 24) == (CurDstAddr >> 24))
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unitcycles++;
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else if ((CurSrcAddr >> 24) == 0x02)
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@ -234,12 +234,12 @@ void DSi_NDMA::Run9()
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while (IterCount > 0 && !Stall)
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{
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NDS::ARM9Timestamp += (unitcycles << NDS::ARM9ClockShift);
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DSi.ARM9Timestamp += (unitcycles << DSi.ARM9ClockShift);
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if (dofill)
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DSi::ARM9Write32(CurDstAddr, FillData);
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DSi.ARM9Write32(CurDstAddr, FillData);
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else
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DSi::ARM9Write32(CurDstAddr, DSi::ARM9Read32(CurSrcAddr));
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DSi.ARM9Write32(CurDstAddr, DSi.ARM9Read32(CurSrcAddr));
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CurSrcAddr += SrcAddrInc<<2;
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CurDstAddr += DstAddrInc<<2;
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@ -247,7 +247,7 @@ void DSi_NDMA::Run9()
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RemCount--;
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TotalRemCount--;
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if (NDS::ARM9Timestamp >= NDS::ARM9Target) break;
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if (DSi.ARM9Timestamp >= DSi.ARM9Target) break;
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}
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Executing = false;
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@ -258,10 +258,10 @@ void DSi_NDMA::Run9()
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if (IterCount == 0)
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{
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Running = 0;
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NDS::ResumeCPU(0, 1<<(Num+4));
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DSi.ResumeCPU(0, 1<<(Num+4));
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if (StartMode == 0x0A)
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GPU.GPU3D.CheckFIFODMA();
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DSi.GPU.GPU3D.CheckFIFODMA();
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}
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return;
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@ -270,25 +270,25 @@ void DSi_NDMA::Run9()
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if ((StartMode & 0x1F) == 0x10) // CHECKME
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{
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Cnt &= ~(1<<31);
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if (Cnt & (1<<30)) NDS::SetIRQ(0, NDS::IRQ_DSi_NDMA0 + Num);
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if (Cnt & (1<<30)) DSi.SetIRQ(0, IRQ_DSi_NDMA0 + Num);
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}
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else if (!(Cnt & (1<<29)))
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{
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if (TotalRemCount == 0)
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{
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Cnt &= ~(1<<31);
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if (Cnt & (1<<30)) NDS::SetIRQ(0, NDS::IRQ_DSi_NDMA0 + Num);
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if (Cnt & (1<<30)) DSi.SetIRQ(0, IRQ_DSi_NDMA0 + Num);
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}
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}
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Running = 0;
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InProgress = false;
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NDS::ResumeCPU(0, 1<<(Num+4));
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DSi.ResumeCPU(0, 1<<(Num+4));
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}
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void DSi_NDMA::Run7()
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{
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if (NDS::ARM7Timestamp >= NDS::ARM7Target) return;
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if (DSi.ARM7Timestamp >= DSi.ARM7Target) return;
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Executing = true;
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@ -303,11 +303,11 @@ void DSi_NDMA::Run7()
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if ((CurSrcAddr >> 24) == 0x02 && (CurDstAddr >> 24) == 0x02)
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{
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unitcycles = NDS::ARM7MemTimings[CurSrcAddr >> 15][2] + NDS::ARM7MemTimings[CurDstAddr >> 15][2];
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unitcycles = DSi.ARM7MemTimings[CurSrcAddr >> 15][2] + DSi.ARM7MemTimings[CurDstAddr >> 15][2];
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}
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else
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{
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unitcycles = NDS::ARM7MemTimings[CurSrcAddr >> 15][3] + NDS::ARM7MemTimings[CurDstAddr >> 15][3];
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unitcycles = DSi.ARM7MemTimings[CurSrcAddr >> 15][3] + DSi.ARM7MemTimings[CurDstAddr >> 15][3];
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if ((CurSrcAddr >> 23) == (CurDstAddr >> 23))
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unitcycles++;
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else if ((CurSrcAddr >> 24) == 0x02)
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@ -323,12 +323,12 @@ void DSi_NDMA::Run7()
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while (IterCount > 0 && !Stall)
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{
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NDS::ARM7Timestamp += unitcycles;
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DSi.ARM7Timestamp += unitcycles;
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if (dofill)
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DSi::ARM7Write32(CurDstAddr, FillData);
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DSi.ARM7Write32(CurDstAddr, FillData);
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else
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DSi::ARM7Write32(CurDstAddr, DSi::ARM7Read32(CurSrcAddr));
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DSi.ARM7Write32(CurDstAddr, DSi.ARM7Read32(CurSrcAddr));
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CurSrcAddr += SrcAddrInc<<2;
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CurDstAddr += DstAddrInc<<2;
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@ -336,7 +336,7 @@ void DSi_NDMA::Run7()
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RemCount--;
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TotalRemCount--;
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if (NDS::ARM7Timestamp >= NDS::ARM7Target) break;
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if (DSi.ARM7Timestamp >= DSi.ARM7Target) break;
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}
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Executing = false;
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@ -347,10 +347,10 @@ void DSi_NDMA::Run7()
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if (IterCount == 0)
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{
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Running = 0;
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NDS::ResumeCPU(1, 1<<(Num+4));
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DSi.ResumeCPU(1, 1<<(Num+4));
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DSi::AES->CheckInputDMA();
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DSi::AES->CheckOutputDMA();
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DSi.AES.CheckInputDMA();
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DSi.AES.CheckOutputDMA();
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}
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return;
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@ -359,23 +359,23 @@ void DSi_NDMA::Run7()
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if ((StartMode & 0x1F) == 0x10) // CHECKME
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{
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Cnt &= ~(1<<31);
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if (Cnt & (1<<30)) NDS::SetIRQ(1, NDS::IRQ_DSi_NDMA0 + Num);
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if (Cnt & (1<<30)) DSi.SetIRQ(1, IRQ_DSi_NDMA0 + Num);
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}
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else if (!(Cnt & (1<<29)))
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{
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if (TotalRemCount == 0)
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{
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Cnt &= ~(1<<31);
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if (Cnt & (1<<30)) NDS::SetIRQ(1, NDS::IRQ_DSi_NDMA0 + Num);
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if (Cnt & (1<<30)) DSi.SetIRQ(1, IRQ_DSi_NDMA0 + Num);
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}
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}
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Running = 0;
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InProgress = false;
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NDS::ResumeCPU(1, 1<<(Num+4));
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DSi.ResumeCPU(1, 1<<(Num+4));
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DSi::AES->CheckInputDMA();
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DSi::AES->CheckOutputDMA();
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DSi.AES.CheckInputDMA();
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DSi.AES.CheckOutputDMA();
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}
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}
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