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implement configurable vram bus width

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not implemented for direct boot
This commit is contained in:
Jaklyy
2024-06-24 16:15:04 -04:00
parent e6ba4075b9
commit f1b71fe5a9
2 changed files with 19 additions and 0 deletions
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18
src/DSi.cpp
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@ -142,6 +142,7 @@ void DSi::Reset()
SCFG_Clock9 = 0x0187; // CHECKME SCFG_Clock9 = 0x0187; // CHECKME
SCFG_Clock7 = 0x0187; SCFG_Clock7 = 0x0187;
SCFG_EXT[0] = 0x8307F100; SCFG_EXT[0] = 0x8307F100;
SetVRAMTimings(true);
SCFG_EXT[1] = 0x93FFFB06; SCFG_EXT[1] = 0x93FFFB06;
SCFG_MC = 0x0010 | (~((u32)(NDSCartSlot.GetCart() != nullptr))&1);//0x0011; SCFG_MC = 0x0010 | (~((u32)(NDSCartSlot.GetCart() != nullptr))&1);//0x0011;
SCFG_RST = 0; SCFG_RST = 0;
@ -215,6 +216,7 @@ void DSi::DoSavestateExtra(Savestate* file)
Set_SCFG_Clock9(SCFG_Clock9); Set_SCFG_Clock9(SCFG_Clock9);
Set_SCFG_MC(SCFG_MC); Set_SCFG_MC(SCFG_MC);
DSP.SetRstLine(SCFG_RST & 0x0001); DSP.SetRstLine(SCFG_RST & 0x0001);
SetVRAMTimings(SCFG_EXT[0] & (1<<13));
MBK[0][8] = 0; MBK[0][8] = 0;
MBK[1][8] = 0; MBK[1][8] = 0;
@ -693,6 +695,7 @@ void DSi::SoftReset()
SCFG_Clock9 = 0x0187; // CHECKME SCFG_Clock9 = 0x0187; // CHECKME
SCFG_Clock7 = 0x0187; SCFG_Clock7 = 0x0187;
SCFG_EXT[0] = 0x8307F100; SCFG_EXT[0] = 0x8307F100;
SetVRAMTimings(true);
SCFG_EXT[1] = 0x93FFFB06; SCFG_EXT[1] = 0x93FFFB06;
SCFG_MC = 0x0010;//0x0011; SCFG_MC = 0x0010;//0x0011;
// TODO: is this actually reset? // TODO: is this actually reset?
@ -1283,6 +1286,14 @@ void DSi::Set_SCFG_MC(u32 val)
} }
} }
void DSi::SetVRAMTimings(bool extrabuswidth)
{
if (extrabuswidth)
SetARM9RegionTimings(0x06000, 0x07000, Mem9_VRAM, 32, 1, 1); // dsi vram
else
SetARM9RegionTimings(0x06000, 0x07000, Mem9_VRAM, 16, 1, 1); // ds vram
}
u8 DSi::ARM9Read8(u32 addr) u8 DSi::ARM9Read8(u32 addr)
{ {
@ -2521,11 +2532,18 @@ void DSi::ARM9IOWrite32(u32 addr, u32 val)
u32 oldram = (SCFG_EXT[0] >> 14) & 0x3; u32 oldram = (SCFG_EXT[0] >> 14) & 0x3;
u32 newram = (val >> 14) & 0x3; u32 newram = (val >> 14) & 0x3;
u32 oldvram = (SCFG_EXT[0] & (1<<13));
u32 newvram = (val & (1<<13));
SCFG_EXT[0] &= ~0x8007F19F; SCFG_EXT[0] &= ~0x8007F19F;
SCFG_EXT[0] |= (val & 0x8007F19F); SCFG_EXT[0] |= (val & 0x8007F19F);
SCFG_EXT[1] &= ~0x0000F080; SCFG_EXT[1] &= ~0x0000F080;
SCFG_EXT[1] |= (val & 0x0000F080); SCFG_EXT[1] |= (val & 0x0000F080);
Log(LogLevel::Debug, "SCFG_EXT = %08X / %08X (val9 %08X)\n", SCFG_EXT[0], SCFG_EXT[1], val); Log(LogLevel::Debug, "SCFG_EXT = %08X / %08X (val9 %08X)\n", SCFG_EXT[0], SCFG_EXT[1], val);
if (oldvram != newvram)
SetVRAMTimings(newvram);
/*switch ((SCFG_EXT[0] >> 14) & 0x3) /*switch ((SCFG_EXT[0] >> 14) & 0x3)
{ {
case 0: case 0:

1
src/DSi.h
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@ -96,6 +96,7 @@ public:
void MapNWRAM_B(u32 num, u8 val); void MapNWRAM_B(u32 num, u8 val);
void MapNWRAM_C(u32 num, u8 val); void MapNWRAM_C(u32 num, u8 val);
void MapNWRAMRange(u32 cpu, u32 num, u32 val); void MapNWRAMRange(u32 cpu, u32 num, u32 val);
void SetVRAMTimings(bool extrabuswidth);
u8 ARM9Read8(u32 addr) override; u8 ARM9Read8(u32 addr) override;
u16 ARM9Read16(u32 addr) override; u16 ARM9Read16(u32 addr) override;