mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2024-11-14 13:27:41 -07:00
add support for writing to VCount. incl. fucked-up display and altering framerate accordingly.
This commit is contained in:
StapleButter
parent
63e15d2480
commit
f54f54fb7e
58
src/GPU.cpp
58
src/GPU.cpp
@ -30,6 +30,8 @@ namespace GPU
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#define FRAME_CYCLES (LINE_CYCLES * 263)
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u16 VCount;
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u32 NextVCount;
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u16 TotalScanlines;
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u16 DispStat[2], VMatch[2];
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@ -50,9 +52,6 @@ u8* VRAM[9] = {VRAM_A, VRAM_B, VRAM_C, VRAM_D, VRAM_E, VRAM_F, VRAM_G, VRAM_H, V
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u8 VRAMCNT[9];
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u8 VRAMSTAT;
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//u32 VRAM_Base[9];
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//u32 VRAM_Mask[9];
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u32 VRAMMap_LCDC;
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u32 VRAMMap_ABG[0x20];
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@ -95,6 +94,8 @@ void DeInit()
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void Reset()
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{
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VCount = 0;
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NextVCount = -1;
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TotalScanlines = 0;
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DispStat[0] = 0;
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DispStat[1] = 0;
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@ -607,6 +608,7 @@ void DisplaySwap(u32 val)
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void StartFrame()
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{
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TotalScanlines = 0;
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StartScanline(0);
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}
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@ -615,23 +617,37 @@ void StartHBlank(u32 line)
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DispStat[0] |= (1<<1);
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DispStat[1] |= (1<<1);
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if (line < 192) NDS::CheckDMAs(0, 0x02);
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if (VCount < 192) NDS::CheckDMAs(0, 0x02);
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if (DispStat[0] & (1<<4)) NDS::SetIRQ(0, NDS::IRQ_HBlank);
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if (DispStat[1] & (1<<4)) NDS::SetIRQ(1, NDS::IRQ_HBlank);
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if (line < 262)
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if (VCount < 262)
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NDS::ScheduleEvent(NDS::Event_LCD, true, (LINE_CYCLES - HBLANK_CYCLES), StartScanline, line+1);
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else
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NDS::ScheduleEvent(NDS::Event_LCD, true, (LINE_CYCLES - HBLANK_CYCLES), FinishFrame, line+1);
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}
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void FinishFrame(u32 lines)
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{
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TotalScanlines = lines;
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}
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void StartScanline(u32 line)
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{
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VCount = line;
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if (line == 0)
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VCount = 0;
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else if (NextVCount != -1)
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VCount = NextVCount;
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else
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VCount++;
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NextVCount = -1;
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DispStat[0] &= ~(1<<1);
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DispStat[1] &= ~(1<<1);
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if (line == VMatch[0])
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if (VCount == VMatch[0])
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{
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DispStat[0] |= (1<<2);
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@ -640,7 +656,7 @@ void StartScanline(u32 line)
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else
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DispStat[0] &= ~(1<<2);
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if (line == VMatch[1])
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if (VCount == VMatch[1])
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{
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DispStat[1] |= (1<<2);
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@ -649,12 +665,12 @@ void StartScanline(u32 line)
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else
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DispStat[1] &= ~(1<<2);
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GPU2D_A->CheckWindows(line);
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GPU2D_B->CheckWindows(line);
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GPU2D_A->CheckWindows(VCount);
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GPU2D_B->CheckWindows(VCount);
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if (line >= 2 && line < 194)
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if (VCount >= 2 && VCount < 194)
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NDS::CheckDMAs(0, 0x03);
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else if (line == 194)
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else if (VCount == 194)
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NDS::StopDMAs(0, 0x03);
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if (line < 192)
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@ -664,6 +680,7 @@ void StartScanline(u32 line)
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// properly would be too much trouble given barely anything
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// uses FIFO display
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// (TODO, eventually: emulate it properly)
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if (VCount < 192)
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NDS::CheckDMAs(0, 0x04);
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if (line == 0)
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@ -676,7 +693,8 @@ void StartScanline(u32 line)
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GPU2D_A->DrawScanline(line);
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GPU2D_B->DrawScanline(line);
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}
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else if (line == 262)
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if (VCount == 262)
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{
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// frame end
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@ -685,7 +703,7 @@ void StartScanline(u32 line)
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}
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else
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{
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if (line == 192)
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if (VCount == 192)
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{
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// VBlank
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DispStat[0] |= (1<<0);
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@ -703,7 +721,7 @@ void StartScanline(u32 line)
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GPU2D_B->VBlank();
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GPU3D::VBlank();
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}
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else if (line == 215)
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else if (VCount == 215)
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{
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GPU3D::VCount215();
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}
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@ -722,4 +740,14 @@ void SetDispStat(u32 cpu, u16 val)
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VMatch[cpu] = (val >> 8) | ((val & 0x80) << 1);
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}
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void SetVCount(u16 val)
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{
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// VCount write is delayed until the next scanline
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// TODO: how does the 3D engine react to VCount writes while it's rendering?
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// TODO: also check the various DMA types that can be involved
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NextVCount = val;
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}
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}
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@ -26,6 +26,7 @@ namespace GPU
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{
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extern u16 VCount;
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extern u16 TotalScanlines;
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extern u16 DispStat[2];
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@ -385,10 +386,13 @@ T ReadVRAM_TexPal(u32 addr)
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void DisplaySwap(u32 val);
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void StartFrame();
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void FinishFrame(u32 lines);
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void StartScanline(u32 line);
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void SetDispStat(u32 cpu, u16 val);
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void SetVCount(u16 val);
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}
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#endif
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@ -380,6 +380,18 @@ void GPU2D::DrawScanline(u32 line)
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{
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u32* dst = &Framebuffer[256*line];
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line = GPU::VCount;
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// scanlines that end up outside of the GPU drawing range
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// (as a result of writing to VCount) are filled white
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if (line > 192)
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{
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for (int i = 0; i < 256; i++)
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dst[i] = 0xFF3F3F3F;
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return;
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}
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u32 dispmode = DispCnt >> 16;
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dispmode &= (Num ? 0x1 : 0x3);
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22
src/NDS.cpp
22
src/NDS.cpp
@ -380,16 +380,16 @@ void RunSystem(s32 cycles)
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}
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}
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void RunFrame()
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u32 RunFrame()
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{
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s32 framecycles = 560190;
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if (!Running) return; // dorp
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if (!Running) return 263; // dorp
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GPU::StartFrame();
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while (Running && framecycles>0)
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while (Running && GPU::TotalScanlines==0)
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{
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s32 ndscyclestorun;
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s32 ndscycles = 0;
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@ -430,21 +430,9 @@ void RunFrame()
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RunSystem(ndscyclestorun);
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//GPU3D::Run(ndscyclestorun);
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/*while (ndscycles < ndscyclestorun)
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{
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ARM7->CyclesToRun = ndscyclestorun - ndscycles - ARM7Offset;
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ARM7->Execute();
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ARM7Offset = 0;
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RunEvents(ARM7->Cycles);
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ndscycles += ARM7->Cycles;
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}
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ARM7Offset = ndscycles - ndscyclestorun;*/
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framecycles -= ndscyclestorun;
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}
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return GPU::TotalScanlines;
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}
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void Reschedule()
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@ -1657,6 +1645,7 @@ void ARM9IOWrite16(u32 addr, u16 val)
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switch (addr)
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{
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case 0x04000004: GPU::SetDispStat(0, val); return;
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case 0x04000006: GPU::SetVCount(val); return;
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case 0x04000060: GPU3D::Write16(addr, val); return;
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@ -2198,6 +2187,7 @@ void ARM7IOWrite16(u32 addr, u16 val)
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switch (addr)
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{
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case 0x04000004: GPU::SetDispStat(1, val); return;
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case 0x04000006: GPU::SetVCount(val); return;
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case 0x040000B8: DMAs[4]->WriteCnt((DMAs[4]->Cnt & 0xFFFF0000) | val); return;
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case 0x040000BA: DMAs[4]->WriteCnt((DMAs[4]->Cnt & 0x0000FFFF) | (val << 16)); return;
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@ -104,7 +104,7 @@ void LoadROM(const char* path, bool direct);
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void LoadBIOS();
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void SetupDirectBoot();
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void RunFrame();
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u32 RunFrame();
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void PressKey(u32 key);
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void ReleaseKey(u32 key);
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@ -386,7 +386,7 @@ wxThread::ExitCode EmuThread::Entry()
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if (emustatus == 1)
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{
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NDS::RunFrame();
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u32 nlines = NDS::RunFrame();
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SDL_LockTexture(sdltex, NULL, &texpixels, &texstride);
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if (texstride == 256*4)
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@ -410,7 +410,9 @@ wxThread::ExitCode EmuThread::Entry()
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SDL_RenderPresent(sdlrend);
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// framerate limiter based off SDL2_gfx
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float framerate = 1000.0f / 60.0f;
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float framerate;
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if (nlines == 263) framerate = 1000.0f / 60.0f;
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else framerate = 1000.0f / ((60.0f * nlines) / 263.0f);
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fpslimitcount++;
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u32 curtick = SDL_GetTicks();
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