Commit Graph

7 Commits

Author SHA1 Message Date
262dc7ad00 this it should work 2020-06-16 11:57:55 +02:00
d2acceb367 fixup for aarch64 JIT 2020-06-16 11:57:54 +02:00
ec965c6014 improve nop handling and proper behaviour for LDM^
fixes dslinux
2020-06-16 11:57:49 +02:00
441869a105 integrate changes from ARM64 backend and more
- better handle LDM/STM in reg alloc
- unify Halted and IRQ in anticipation for branch inlining
- literal optimisations can be disabled in gui
- jit blocks follow simple returns
- fix idle loop detection
- break jit blocks on IRQ (fixes saving in Pokemon White)
2020-06-16 11:57:45 +02:00
40b88ab05a new block cache and much more...
- more reliable code invalidation detection
- blocks aren't stopped at any branch, but are being followed
if possible to get larger blocks
- idle loop recognition
- optimised literal loads, load/store cycle counting
 and loads/stores from constant addresses
2020-06-16 11:56:36 +02:00
0e26aa4ede load register only if needed
- do thumb bl long merge in the first step
- preparations for better branch jitting
2020-06-16 11:56:02 +02:00
27cbc821b1 jit: thumb block transfer working
also pc and sp relative loads and some refactoring
2020-06-16 11:53:08 +02:00