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5903b11bda
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subtract cycles after checking IRQ and Halt
also switch back to adding to ARM::Cycles instead of subtracting from them
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2020-07-27 23:14:39 +02:00 |
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887ad27ed8
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implement carry setting ALU op with imm
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2020-07-25 22:08:43 +02:00 |
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116d831cfd
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Fix 16-bit DSi ARM9 read
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2020-07-23 20:06:44 +00:00 |
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f5130f82eb
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Arisotura isn't the only derp
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2020-07-23 19:56:09 +00:00 |
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e85d2e2cf3
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Use the correct slow path for block read/write
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2020-07-23 19:12:25 +00:00 |
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961b4252e2
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Make it buildable on aarch64
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2020-07-23 19:07:33 +00:00 |
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3827fa562f
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another try
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2020-07-09 00:11:47 +02:00 |
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3786660099
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misc JIT changes
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2020-07-08 23:08:25 +02:00 |
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c5381d2911
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reconcile DSi and JIT, fastmem for x64 and Windows
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2020-06-30 23:50:41 +02:00 |
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e335a8ca76
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first steps in bringing over the JIT refactor/fastmem
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2020-06-16 12:11:19 +02:00 |
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0f53a34551
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rewrite JIT memory emulation
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2020-05-09 00:45:05 +02:00 |
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5d0f244f3c
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include more information in DataRegion
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2020-04-26 13:05:16 +02:00 |
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59f710158f
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arm64 fix itcm invalidation and ldm^/stm^
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2020-04-26 13:05:15 +02:00 |
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05962d9798
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the time of good commit names is long gone
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2020-04-26 13:05:14 +02:00 |
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266fd20ea5
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fixup for aarch64 JIT
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2020-04-26 13:05:12 +02:00 |
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42d67c8145
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fix LDM usermode for aarch64 as well
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2020-04-26 13:05:12 +02:00 |
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899cf97c51
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apply fixes for aarch64 linux by @nadiaholmquist
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2020-04-26 13:05:10 +02:00 |
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d6cc7de6c4
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move ARM64 JIT backend here
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2020-04-26 13:05:09 +02:00 |
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