7424f9fda0
remove leftover debug code
2020-04-26 13:05:04 +02:00
a687be9879
new block cache and much more...
...
- more reliable code invalidation detection
- blocks aren't stopped at any branch, but are being followed
if possible to get larger blocks
- idle loop recognition
- optimised literal loads, load/store cycle counting
and loads/stores from constant addresses
2020-04-26 13:05:03 +02:00
5338c28f40
load register only if needed
...
- do thumb bl long merge in the first step
- preparations for better branch jitting
2020-04-26 13:05:02 +02:00
2ef776883f
more fixes for flag optimisation
...
+ small cycle counting optimisation
2020-04-26 13:05:02 +02:00
5202c505ab
remove debug printing
2020-04-26 13:05:01 +02:00
5ea91b8a03
optimise away unneeded flag sets
...
- especially useful for thumb code and larger max block sizes
- can still be improved upon
2020-04-26 13:05:00 +02:00
3001d9492c
abandon pipelining on jit
...
fixes Golden Sun Dawn
this makes the cpu state incompatible between interpreter and JIT. That's why switching cpu mode requires a restart(not requiring is stupid anyway) and the pipeline is manually filled when making a save state.
2020-04-26 13:04:59 +02:00
5e443e7962
remove unneeded dolphin code, C++11 static_assert
2020-04-26 13:04:57 +02:00
9d180c7bbc
jit: decrease blockcache AddrMapping size for ARM9
2020-04-26 13:03:09 +02:00
be8846e31a
jit: fix misc static branch things
2020-04-26 13:03:08 +02:00
411fb57c07
jit: add compile option
2020-04-26 13:03:06 +02:00
9d76d63af5
jit: make everything configurable
2020-04-26 13:03:03 +02:00
dcf6e1cad2
jit: fix linux
2020-04-26 13:03:01 +02:00
6f0dcad4f6
jit: fix wrongly placed const
2020-04-26 13:03:01 +02:00
9b3c14b58a
jit: SMULL and SMLAL
2020-04-26 13:03:00 +02:00
2efab201e9
jit: LDM/STM finally(!) working + MUL, MLA and CLZ
2020-04-26 13:02:59 +02:00
c58fdbd66b
jit: branch instructions
2020-04-26 13:02:58 +02:00
ff97211114
jit: thumb block transfer working
...
also pc and sp relative loads and some refactoring
2020-04-26 13:02:57 +02:00
2c44bf927c
JIT: most mem instructions working
...
+ branching
2020-04-26 13:02:57 +02:00
5f932cdf48
JIT: compilation of word load and store
2020-04-26 13:02:56 +02:00
ebce9f035f
JIT: implemented most ALU instructions
2020-04-26 13:02:55 +02:00
c5c342c009
JIT: base
...
all instructions are interpreted
2020-04-26 13:02:53 +02:00
