Commit Graph

30 Commits

Author SHA1 Message Date
99b34efe2d move ARM64 JIT backend here 2020-06-16 11:57:51 +02:00
441869a105 integrate changes from ARM64 backend and more
- better handle LDM/STM in reg alloc
- unify Halted and IRQ in anticipation for branch inlining
- literal optimisations can be disabled in gui
- jit blocks follow simple returns
- fix idle loop detection
- break jit blocks on IRQ (fixes saving in Pokemon White)
2020-06-16 11:57:45 +02:00
40b88ab05a new block cache and much more...
- more reliable code invalidation detection
- blocks aren't stopped at any branch, but are being followed
if possible to get larger blocks
- idle loop recognition
- optimised literal loads, load/store cycle counting
 and loads/stores from constant addresses
2020-06-16 11:56:36 +02:00
316378092a abandon pipelining on jit
fixes Golden Sun Dawn
this makes the cpu state incompatible between interpreter and JIT. That's why switching cpu mode requires a restart(not requiring is stupid anyway) and the pipeline is manually filled when making a save state.
2020-06-16 11:55:24 +02:00
86f2be7260 jit: add compile option 2020-06-16 11:54:03 +02:00
d13d625f73 jit: make everything configurable 2020-06-16 11:53:21 +02:00
43e045357f make it able to switch between DS and DSi modes 2020-06-01 20:36:30 +02:00
2327de2423 Merge commit '4b57416552ec2fa95216e2b044559f215723bf70' into melonDSi 2020-05-30 03:12:42 +02:00
b44570eba1 merge moar 2020-05-30 03:04:14 +02:00
83f8e11bc1 update copyright years 2020-02-14 20:18:08 +01:00
e117da235e smarter CP15 PU region updates. disable some useless logging.
fixes #528
2019-10-21 23:14:34 +02:00
83d23939db melonDSi: skeleton in place 2019-06-15 13:09:11 +02:00
00a5576492 fasterer IRQ check. clean up code. 2019-06-08 22:16:51 +02:00
b0efde8bf7 also, update copyright name 2019-01-22 15:58:29 +01:00
669247e8c8 redesign main emu loop to use timestamps instead of being a trainwreck
* cleaner code
* faster in some cases
* more accurate (on-demand compensation for timers and GPU)
* less prone to desyncs
* overall betterer
2019-01-05 05:28:58 +01:00
90f2c0834e add PoC ARM9 instruction cache logic. not actually in use, but it's there as a reference (and if we ever need it). 2019-01-04 21:47:06 +01:00
4aafdee14d more sensible cache timings
(still a big fat hack)
2018-12-11 17:59:52 +01:00
29bca33bc6 take it somewhere.
still need to speed it up a tad.
2018-12-09 01:17:05 +01:00
86dae1a25c make this other branch where we're going to actually make it usable
but it'll be a gross hack
2018-12-08 20:27:00 +01:00
0b1c2f9691 begin PU work 2018-12-04 18:32:19 +01:00
172fb4876a begin work on general timing renovation. way shitty because it behaves as if caches were off, so everything will be slow as shit. 2018-12-04 17:54:10 +01:00
7ba32ea076 make the ARM clock shift configurable. nothing fancy there, just paving the way for DSi support later. 2018-11-07 18:38:54 +01:00
b4165cc0a9 3D: keep the rasterizer from accidentally going out of bounds when given very flat X-major edge slopes.
this, by a fucking shitshow of butterfly effect, ends up fixing #234. technically, the rasterizer was going out of bounds, which, under certain circumstances, caused interpolation to shit itself and generate Z values that were out of range (but still ended up in the zbuffer). sometimes those values ended up negative, which caused these glitches when polygons had to be drawn over those.

about fucking time.
2018-11-04 23:21:58 +01:00
de91eabf71 savestate shito: fix compile errors.
still far from being finished, so avoid using unless you want to spawn blackholes or some pretty bad shit.
2018-10-18 00:27:55 +02:00
0bfd019dc0 start implementing actual shito
(also looks like the test bench in libui_sdl/main.cpp snuck in with the copyright update. shit)
2018-09-15 02:47:34 +02:00
fea7955675 fixor copyright years. 2018-09-15 02:32:13 +02:00
bbd251ddbc fix QADD/QSUB/QDADD/QDSUB, those would write their result to the wrong register.
also make them ARM9-only.
2017-06-13 11:17:22 +02:00
4f72ee3895 add support for polygon ID and conditional depth update for translucent pixels 2017-04-22 16:47:31 +02:00
2380c2f4ea hopefully fix the DMA bug without breaking everything this time. 2017-04-13 04:16:57 +02:00
8a4ed8f41c reorganize repo, move shit around 2017-03-16 23:01:22 +01:00