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2,544 Commits 56 Branches 24 Tags
d1eff4acf568ec989fda7aa8c68d3567d59cce43
Commit Graph

88 Commits

Author SHA1 Message Date
RSDuck
59c8d39765 hopefully fix stack handling for linux 2020-04-26 16:17:16 +02:00
RSDuck
a9dd6e30ad implement msr and mrs for the x64 JIT 2020-04-26 13:05:18 +02:00
RSDuck
68d552074b compile UMULLs and some fixes 2020-04-26 13:05:17 +02:00
RSDuck
3787bab1f6 implement block linking + some refactoring 
currently only supported for x64
 2020-04-26 13:05:17 +02:00
RSDuck
5d0f244f3c include more information in DataRegion 2020-04-26 13:05:16 +02:00
RSDuck
9b98b8816a improve nop handling and proper behaviour for LDM^ 
fixes dslinux
 2020-04-26 13:05:08 +02:00
RSDuck
60650fa82e disable literal optimations in DTCM 2020-04-26 13:05:07 +02:00
RSDuck
386100c053 make literal optimisation more reliable 
fixes spanish Pokemon HeartGold
 2020-04-26 13:05:06 +02:00
RSDuck
81f38c14be integrate changes from ARM64 backend and more 
- better handle LDM/STM in reg alloc
- unify Halted and IRQ in anticipation for branch inlining
- literal optimisations can be disabled in gui
- jit blocks follow simple returns
- fix idle loop detection
- break jit blocks on IRQ (fixes saving in Pokemon White)
 2020-04-26 13:05:05 +02:00
RSDuck
aa23f21b8d decrease jit block cache address granularity 
fixes Dragon Quest IX
move code with side effects out of assert, fixes release build
(thanks to m4wx for this one)
also remove some leftovers of jit pipelining
 2020-04-26 13:05:05 +02:00
RSDuck
7424f9fda0 remove leftover debug code 2020-04-26 13:05:04 +02:00
RSDuck
a687be9879 new block cache and much more... 
- more reliable code invalidation detection
- blocks aren't stopped at any branch, but are being followed
if possible to get larger blocks
- idle loop recognition
- optimised literal loads, load/store cycle counting
 and loads/stores from constant addresses
 2020-04-26 13:05:03 +02:00
RSDuck
5338c28f40 load register only if needed 
- do thumb bl long merge in the first step
- preparations for better branch jitting
 2020-04-26 13:05:02 +02:00
RSDuck
2ef776883f more fixes for flag optimisation 
+ small cycle counting optimisation
 2020-04-26 13:05:02 +02:00
RSDuck
5202c505ab remove debug printing 2020-04-26 13:05:01 +02:00
RSDuck
ea562d2fec fixes for flag optimisation 2020-04-26 13:05:01 +02:00
RSDuck
5ea91b8a03 optimise away unneeded flag sets 
- especially useful for thumb code and larger max block sizes
- can still be improved upon
 2020-04-26 13:05:00 +02:00
RSDuck
3001d9492c abandon pipelining on jit 
fixes Golden Sun Dawn
this makes the cpu state incompatible between interpreter and JIT. That's why switching cpu mode requires a restart(not requiring is stupid anyway) and the pipeline is manually filled when making a save state.
 2020-04-26 13:04:59 +02:00
RSDuck
5e443e7962 remove unneeded dolphin code, C++11 static_assert 2020-04-26 13:04:57 +02:00
RSDuck
f31976fed0 jit: fix RSC 2020-04-26 13:03:12 +02:00
RSDuck
4a0f6b3b4b jit: fix thumb hi reg alu and mcr halt 
+ mcr/mrc aren't always, msr_imm is never unk on ARM7
 2020-04-26 13:03:10 +02:00
RSDuck
9d180c7bbc jit: decrease blockcache AddrMapping size for ARM9 2020-04-26 13:03:09 +02:00
RSDuck
be8846e31a jit: fix misc static branch things 2020-04-26 13:03:08 +02:00
RSDuck
54985be157 jit: LDM/STM keep proper stack alignment 2020-04-26 13:03:08 +02:00
RSDuck
8ddc4d5904 jit: fix BLX_reg with rn=lr 2020-04-26 13:03:07 +02:00
RSDuck
411fb57c07 jit: add compile option 2020-04-26 13:03:06 +02:00
RSDuck
9d76d63af5 jit: make everything configurable 2020-04-26 13:03:03 +02:00
RSDuck
dcf6e1cad2 jit: fix linux 2020-04-26 13:03:01 +02:00
RSDuck
6f0dcad4f6 jit: fix wrongly placed const 2020-04-26 13:03:01 +02:00
RSDuck
9b3c14b58a jit: SMULL and SMLAL 2020-04-26 13:03:00 +02:00
RSDuck
2efab201e9 jit: LDM/STM finally(!) working + MUL, MLA and CLZ 2020-04-26 13:02:59 +02:00
RSDuck
c58fdbd66b jit: branch instructions 2020-04-26 13:02:58 +02:00
RSDuck
ff97211114 jit: thumb block transfer working 
also pc and sp relative loads and some refactoring
 2020-04-26 13:02:57 +02:00
RSDuck
2c44bf927c JIT: most mem instructions working 
+ branching
 2020-04-26 13:02:57 +02:00
RSDuck
5f932cdf48 JIT: compilation of word load and store 2020-04-26 13:02:56 +02:00
RSDuck
ff901141e7 jit: correct cycle counting for thumb shift by reg 2020-04-26 13:02:55 +02:00
RSDuck
ebce9f035f JIT: implemented most ALU instructions 2020-04-26 13:02:55 +02:00
RSDuck
c5c342c009 JIT: base 
all instructions are interpreted
 2020-04-26 13:02:53 +02:00