24 Commits

Author	SHA1	Message	Date
RSDuck	d57ee718ba	remove debug printing	2020-06-16 11:56:00 +02:00
RSDuck	d208f5909c	fixes for flag optimisation	2020-06-16 11:55:53 +02:00
RSDuck	f378458c10	optimise away unneeded flag sets ... - especially useful for thumb code and larger max block sizes - can still be improved upon	2020-06-16 11:55:44 +02:00
RSDuck	316378092a	abandon pipelining on jit ... fixes Golden Sun Dawn this makes the cpu state incompatible between interpreter and JIT. That's why switching cpu mode requires a restart(not requiring is stupid anyway) and the pipeline is manually filled when making a save state.	2020-06-16 11:55:24 +02:00
RSDuck	86b96ca47a	remove unneeded dolphin code, C++11 static_assert	2020-06-16 11:54:50 +02:00
RSDuck	851930f5e0	jit: fix RSC	2020-06-16 11:54:49 +02:00
RSDuck	d74b15eecc	jit: fix thumb hi reg alu and mcr halt ... + mcr/mrc aren't always, msr_imm is never unk on ARM7	2020-06-16 11:54:06 +02:00
RSDuck	4deecc7d65	jit: decrease blockcache AddrMapping size for ARM9	2020-06-16 11:54:05 +02:00
RSDuck	03b321f540	jit: fix misc static branch things	2020-06-16 11:54:05 +02:00
RSDuck	3167ddcde1	jit: LDM/STM keep proper stack alignment	2020-06-16 11:54:04 +02:00
RSDuck	dd04cef47e	jit: fix BLX_reg with rn=lr	2020-06-16 11:54:03 +02:00
RSDuck	86f2be7260	jit: add compile option	2020-06-16 11:54:03 +02:00
RSDuck	d13d625f73	jit: make everything configurable	2020-06-16 11:53:21 +02:00
RSDuck	0ff79ea2ad	jit: fix linux	2020-06-16 11:53:11 +02:00
RSDuck	24aff49ae4	jit: fix wrongly placed const	2020-06-16 11:53:11 +02:00
RSDuck	9336fcbbe6	jit: SMULL and SMLAL	2020-06-16 11:53:10 +02:00
RSDuck	f22521a43d	jit: LDM/STM finally(!) working + MUL, MLA and CLZ	2020-06-16 11:53:10 +02:00
RSDuck	83bd863361	jit: branch instructions	2020-06-16 11:53:09 +02:00
RSDuck	27cbc821b1	jit: thumb block transfer working ... also pc and sp relative loads and some refactoring	2020-06-16 11:53:08 +02:00
RSDuck	10e386fe50	JIT: most mem instructions working ... + branching	2020-06-16 11:53:08 +02:00
RSDuck	550e6b86d2	JIT: compilation of word load and store	2020-06-16 11:53:07 +02:00
RSDuck	ea98a44e1e	jit: correct cycle counting for thumb shift by reg	2020-06-16 11:53:06 +02:00
RSDuck	2f6b46fd4f	JIT: implemented most ALU instructions	2020-06-16 11:53:06 +02:00
RSDuck	c692287eba	JIT: base ... all instructions are interpreted	2020-06-16 11:53:05 +02:00