ec965c6014
improve nop handling and proper behaviour for LDM^
...
fixes dslinux
2020-06-16 11:57:49 +02:00
40b88ab05a
new block cache and much more...
...
- more reliable code invalidation detection
- blocks aren't stopped at any branch, but are being followed
if possible to get larger blocks
- idle loop recognition
- optimised literal loads, load/store cycle counting
and loads/stores from constant addresses
2020-06-16 11:56:36 +02:00
0e26aa4ede
load register only if needed
...
- do thumb bl long merge in the first step
- preparations for better branch jitting
2020-06-16 11:56:02 +02:00
85680d6fe5
more fixes for flag optimisation
...
+ small cycle counting optimisation
2020-06-16 11:56:01 +02:00
f378458c10
optimise away unneeded flag sets
...
- especially useful for thumb code and larger max block sizes
- can still be improved upon
2020-06-16 11:55:44 +02:00
86b96ca47a
remove unneeded dolphin code, C++11 static_assert
2020-06-16 11:54:50 +02:00
86f2be7260
jit: add compile option
2020-06-16 11:54:03 +02:00
d13d625f73
jit: make everything configurable
2020-06-16 11:53:21 +02:00
0ff79ea2ad
jit: fix linux
2020-06-16 11:53:11 +02:00
9336fcbbe6
jit: SMULL and SMLAL
2020-06-16 11:53:10 +02:00
f22521a43d
jit: LDM/STM finally(!) working + MUL, MLA and CLZ
2020-06-16 11:53:10 +02:00
83bd863361
jit: branch instructions
2020-06-16 11:53:09 +02:00
27cbc821b1
jit: thumb block transfer working
...
also pc and sp relative loads and some refactoring
2020-06-16 11:53:08 +02:00
10e386fe50
JIT: most mem instructions working
...
+ branching
2020-06-16 11:53:08 +02:00
550e6b86d2
JIT: compilation of word load and store
2020-06-16 11:53:07 +02:00
2f6b46fd4f
JIT: implemented most ALU instructions
2020-06-16 11:53:06 +02:00
c692287eba
JIT: base
...
all instructions are interpreted
2020-06-16 11:53:05 +02:00