|
|
1c44d9f66d
|
Fix for some SIMD issues
|
2018-02-18 01:57:33 -03:00 |
|
|
|
161193e113
|
CPU refactoring - move SIMD (scalar and vector) instructions to separate files by category, remove AILConv and use only the methods inside SIMD helper to extract/insert vector elements
|
2018-02-17 18:06:11 -03:00 |
|
|
|
7c314eadcf
|
Emit CIL directly for more SIMD instructions, add UCVTF (vector, scalar) and UZP2, fix XTN (?)
|
2018-02-15 01:32:25 -03:00 |
|
|
|
55743c0cba
|
Only throw undefined instruction exception at execution, not at translation stage
|
2018-02-10 14:20:46 -03:00 |
|
|
|
6a3aa6cd88
|
Add FVCTZS (fixed point variant) and LD1 (single structure variant) instructions
|
2018-02-09 00:26:20 -03:00 |
|
