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https://github.com/dolphin-emu/dolphin.git
synced 2024-11-15 05:47:56 -07:00
JitArm64: Restructure the BackPatchInfo flags enum
This makes it possible to construct flag combinations like "load 16 bits into an FPR".
This commit is contained in:
parent
059794b551
commit
36b3d51523
@ -58,14 +58,14 @@ void JitArm64::EmitBackpatchRoutine(u32 flags, bool fastmem, bool do_farcode, AR
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if (fastmem)
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{
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if (flags & BackPatchInfo::FLAG_STORE && flags & BackPatchInfo::FLAG_MASK_FLOAT)
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if ((flags & BackPatchInfo::FLAG_STORE) && (flags & BackPatchInfo::FLAG_FLOAT))
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{
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if (flags & BackPatchInfo::FLAG_SIZE_F32)
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if ((flags & BackPatchInfo::FLAG_SIZE_32) && !(flags & BackPatchInfo::FLAG_PAIR))
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{
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m_float_emit.REV32(8, ARM64Reg::D0, RS);
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m_float_emit.STR(32, ARM64Reg::D0, MEM_REG, addr);
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}
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else if (flags & BackPatchInfo::FLAG_SIZE_F32X2)
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else if ((flags & BackPatchInfo::FLAG_SIZE_32) && (flags & BackPatchInfo::FLAG_PAIR))
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{
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m_float_emit.REV32(8, ARM64Reg::D0, RS);
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m_float_emit.STR(64, ARM64Reg::Q0, MEM_REG, addr);
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@ -76,9 +76,9 @@ void JitArm64::EmitBackpatchRoutine(u32 flags, bool fastmem, bool do_farcode, AR
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m_float_emit.STR(64, ARM64Reg::Q0, MEM_REG, addr);
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}
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}
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else if (flags & BackPatchInfo::FLAG_LOAD && flags & BackPatchInfo::FLAG_MASK_FLOAT)
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else if ((flags & BackPatchInfo::FLAG_LOAD) && (flags & BackPatchInfo::FLAG_FLOAT))
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{
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if (flags & BackPatchInfo::FLAG_SIZE_F32)
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if (flags & BackPatchInfo::FLAG_SIZE_32)
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{
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m_float_emit.LDR(32, EncodeRegToDouble(RS), MEM_REG, addr);
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m_float_emit.REV32(8, EncodeRegToDouble(RS), EncodeRegToDouble(RS));
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@ -158,15 +158,15 @@ void JitArm64::EmitBackpatchRoutine(u32 flags, bool fastmem, bool do_farcode, AR
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ABI_PushRegisters(gprs_to_push);
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m_float_emit.ABI_PushRegisters(fprs_to_push, ARM64Reg::X30);
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if (flags & BackPatchInfo::FLAG_STORE && flags & BackPatchInfo::FLAG_MASK_FLOAT)
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if ((flags & BackPatchInfo::FLAG_STORE) && (flags & BackPatchInfo::FLAG_FLOAT))
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{
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if (flags & BackPatchInfo::FLAG_SIZE_F32)
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if ((flags & BackPatchInfo::FLAG_SIZE_32) && !(flags & BackPatchInfo::FLAG_PAIR))
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{
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m_float_emit.UMOV(32, ARM64Reg::W0, RS, 0);
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MOVP2R(ARM64Reg::X8, &PowerPC::Write_U32);
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BLR(ARM64Reg::X8);
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}
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else if (flags & BackPatchInfo::FLAG_SIZE_F32X2)
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else if ((flags & BackPatchInfo::FLAG_SIZE_32) && (flags & BackPatchInfo::FLAG_PAIR))
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{
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m_float_emit.UMOV(64, ARM64Reg::X0, RS, 0);
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MOVP2R(ARM64Reg::X8, &PowerPC::Write_U64);
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@ -180,9 +180,9 @@ void JitArm64::EmitBackpatchRoutine(u32 flags, bool fastmem, bool do_farcode, AR
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BLR(ARM64Reg::X8);
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}
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}
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else if (flags & BackPatchInfo::FLAG_LOAD && flags & BackPatchInfo::FLAG_MASK_FLOAT)
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else if ((flags & BackPatchInfo::FLAG_LOAD) && (flags & BackPatchInfo::FLAG_FLOAT))
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{
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if (flags & BackPatchInfo::FLAG_SIZE_F32)
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if (flags & BackPatchInfo::FLAG_SIZE_32)
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{
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MOVP2R(ARM64Reg::X8, &PowerPC::Read_U32);
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BLR(ARM64Reg::X8);
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@ -26,7 +26,7 @@ void JitArm64::lfXX(UGeckoInstruction inst)
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u32 a = inst.RA, b = inst.RB;
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s32 offset = inst.SIMM_16;
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u32 flags = BackPatchInfo::FLAG_LOAD;
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u32 flags = BackPatchInfo::FLAG_LOAD | BackPatchInfo::FLAG_FLOAT;
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bool update = false;
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s32 offset_reg = -1;
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@ -36,38 +36,38 @@ void JitArm64::lfXX(UGeckoInstruction inst)
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switch (inst.SUBOP10)
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{
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case 567: // lfsux
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flags |= BackPatchInfo::FLAG_SIZE_F32;
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flags |= BackPatchInfo::FLAG_SIZE_32;
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update = true;
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offset_reg = b;
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break;
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case 535: // lfsx
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flags |= BackPatchInfo::FLAG_SIZE_F32;
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flags |= BackPatchInfo::FLAG_SIZE_32;
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offset_reg = b;
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break;
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case 631: // lfdux
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flags |= BackPatchInfo::FLAG_SIZE_F64;
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flags |= BackPatchInfo::FLAG_SIZE_64;
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update = true;
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offset_reg = b;
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break;
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case 599: // lfdx
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flags |= BackPatchInfo::FLAG_SIZE_F64;
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flags |= BackPatchInfo::FLAG_SIZE_64;
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offset_reg = b;
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break;
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}
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break;
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case 49: // lfsu
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flags |= BackPatchInfo::FLAG_SIZE_F32;
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flags |= BackPatchInfo::FLAG_SIZE_32;
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update = true;
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break;
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case 48: // lfs
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flags |= BackPatchInfo::FLAG_SIZE_F32;
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flags |= BackPatchInfo::FLAG_SIZE_32;
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break;
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case 51: // lfdu
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flags |= BackPatchInfo::FLAG_SIZE_F64;
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flags |= BackPatchInfo::FLAG_SIZE_64;
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update = true;
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break;
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case 50: // lfd
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flags |= BackPatchInfo::FLAG_SIZE_F64;
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flags |= BackPatchInfo::FLAG_SIZE_64;
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break;
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}
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@ -75,7 +75,7 @@ void JitArm64::lfXX(UGeckoInstruction inst)
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bool is_immediate = false;
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const RegType type =
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(flags & BackPatchInfo::FLAG_SIZE_F64) != 0 ? RegType::LowerPair : RegType::DuplicatedSingle;
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(flags & BackPatchInfo::FLAG_SIZE_64) != 0 ? RegType::LowerPair : RegType::DuplicatedSingle;
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gpr.Lock(ARM64Reg::W0, ARM64Reg::W30);
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fpr.Lock(ARM64Reg::Q0);
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@ -190,7 +190,7 @@ void JitArm64::stfXX(UGeckoInstruction inst)
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bool want_single = false;
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s32 offset = inst.SIMM_16;
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u32 flags = BackPatchInfo::FLAG_STORE;
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u32 flags = BackPatchInfo::FLAG_STORE | BackPatchInfo::FLAG_FLOAT;
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bool update = false;
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s32 offset_reg = -1;
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@ -201,46 +201,46 @@ void JitArm64::stfXX(UGeckoInstruction inst)
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{
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case 663: // stfsx
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want_single = true;
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flags |= BackPatchInfo::FLAG_SIZE_F32;
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flags |= BackPatchInfo::FLAG_SIZE_32;
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offset_reg = b;
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break;
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case 695: // stfsux
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want_single = true;
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flags |= BackPatchInfo::FLAG_SIZE_F32;
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flags |= BackPatchInfo::FLAG_SIZE_32;
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update = true;
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offset_reg = b;
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break;
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case 727: // stfdx
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flags |= BackPatchInfo::FLAG_SIZE_F64;
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flags |= BackPatchInfo::FLAG_SIZE_64;
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offset_reg = b;
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break;
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case 759: // stfdux
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flags |= BackPatchInfo::FLAG_SIZE_F64;
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flags |= BackPatchInfo::FLAG_SIZE_64;
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update = true;
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offset_reg = b;
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break;
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case 983: // stfiwx
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// This instruction writes the lower 32 bits of a double. want_single must be false
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flags |= BackPatchInfo::FLAG_SIZE_F32;
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flags |= BackPatchInfo::FLAG_SIZE_32;
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offset_reg = b;
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break;
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}
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break;
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case 53: // stfsu
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want_single = true;
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flags |= BackPatchInfo::FLAG_SIZE_F32;
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flags |= BackPatchInfo::FLAG_SIZE_32;
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update = true;
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break;
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case 52: // stfs
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want_single = true;
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flags |= BackPatchInfo::FLAG_SIZE_F32;
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flags |= BackPatchInfo::FLAG_SIZE_32;
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break;
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case 55: // stfdu
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flags |= BackPatchInfo::FLAG_SIZE_F64;
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flags |= BackPatchInfo::FLAG_SIZE_64;
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update = true;
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break;
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case 54: // stfd
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flags |= BackPatchInfo::FLAG_SIZE_F64;
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flags |= BackPatchInfo::FLAG_SIZE_64;
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break;
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}
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@ -361,16 +361,16 @@ void JitArm64::stfXX(UGeckoInstruction inst)
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if (jo.optimizeGatherPipe && PowerPC::IsOptimizableGatherPipeWrite(imm_addr))
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{
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int accessSize;
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if (flags & BackPatchInfo::FLAG_SIZE_F64)
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if (flags & BackPatchInfo::FLAG_SIZE_64)
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accessSize = 64;
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else
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accessSize = 32;
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LDR(IndexType::Unsigned, ARM64Reg::X0, PPC_REG, PPCSTATE_OFF(gather_pipe_ptr));
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if (flags & BackPatchInfo::FLAG_SIZE_F64)
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if (flags & BackPatchInfo::FLAG_SIZE_64)
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m_float_emit.REV64(8, ARM64Reg::Q0, V0);
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else if (flags & BackPatchInfo::FLAG_SIZE_F32)
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else if (flags & BackPatchInfo::FLAG_SIZE_32)
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m_float_emit.REV32(8, ARM64Reg::D0, V0);
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m_float_emit.STR(accessSize, IndexType::Post, accessSize == 64 ? ARM64Reg::Q0 : ARM64Reg::D0,
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@ -198,9 +198,9 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
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if (js.assumeNoPairedQuantize)
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{
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u32 flags = BackPatchInfo::FLAG_STORE;
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flags |= (w ? BackPatchInfo::FLAG_SIZE_F32 : BackPatchInfo::FLAG_SIZE_F32X2);
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u32 flags = BackPatchInfo::FLAG_STORE | BackPatchInfo::FLAG_FLOAT | BackPatchInfo::FLAG_SIZE_32;
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if (!w)
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flags |= BackPatchInfo::FLAG_PAIR;
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EmitBackpatchRoutine(flags, jo.fastmem, jo.fastmem, VS, EncodeRegTo64(addr_reg), gprs_in_use,
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fprs_in_use);
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@ -13,31 +13,32 @@ struct BackPatchInfo
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FLAG_SIZE_8 = (1 << 2),
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FLAG_SIZE_16 = (1 << 3),
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FLAG_SIZE_32 = (1 << 4),
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FLAG_SIZE_F32 = (1 << 5),
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FLAG_SIZE_F32X2 = (1 << 6),
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FLAG_SIZE_F64 = (1 << 7),
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FLAG_SIZE_64 = (1 << 5),
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FLAG_FLOAT = (1 << 6),
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FLAG_PAIR = (1 << 7),
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FLAG_REVERSE = (1 << 8),
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FLAG_EXTEND = (1 << 9),
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FLAG_ZERO_256 = (1 << 10),
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FLAG_MASK_FLOAT = FLAG_SIZE_F32 | FLAG_SIZE_F32X2 | FLAG_SIZE_F64,
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};
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static u32 GetFlagSize(u32 flags)
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{
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u32 size = 0;
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if (flags & FLAG_SIZE_8)
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return 8;
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size = 8;
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if (flags & FLAG_SIZE_16)
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return 16;
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size = 16;
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if (flags & FLAG_SIZE_32)
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return 32;
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if (flags & FLAG_SIZE_F32)
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return 32;
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if (flags & FLAG_SIZE_F32X2)
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return 64;
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if (flags & FLAG_SIZE_F64)
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return 64;
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size = 32;
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if (flags & FLAG_SIZE_64)
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size = 64;
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if (flags & FLAG_ZERO_256)
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return 256;
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return 0;
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size = 256;
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if (flags & FLAG_PAIR)
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size *= 2;
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return size;
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}
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};
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