piwalker/dolphin
1
0
Fork 0
mirror of https://github.com/dolphin-emu/dolphin.git synced 2024-11-15 05:47:56 -07:00
Code Issues Actions Packages Projects Releases Wiki Activity

Merge pull request #415 from magumagu/memory-cleanup

Browse Source 
Memory code cleanup
This commit is contained in:
shuffle2 2014-05-26 13:35:54 -07:00
commit 4758b362c3
6 changed files with 13 additions and 53 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Source/Core/Core/HW/Memmap.cpp
View File

@ -237,7 +237,7 @@ void Memset(const u32 _Address, const u8 _iValue, const u32 _iLength)
void DMA_LCToMemory(const u32 _MemAddr, const u32 _CacheAddr, const u32 _iNumBlocks)
{
const u8 *src = GetCachePtr() + (_CacheAddr & 0x3FFFF);
const u8 *src = m_pL1Cache + (_CacheAddr & 0x3FFFF);
u8 *dst = GetPointer(_MemAddr);
if ((dst != nullptr) && (src != nullptr) && (_MemAddr & 3) == 0 && (_CacheAddr & 3) == 0)
@ -257,7 +257,7 @@ void DMA_LCToMemory(const u32 _MemAddr, const u32 _CacheAddr, const u32 _iNumBlo
void DMA_MemoryToLC(const u32 _CacheAddr, const u32 _MemAddr, const u32 _iNumBlocks)
{
const u8 *src = GetPointer(_MemAddr);
u8 *dst = GetCachePtr() + (_CacheAddr & 0x3FFFF);
u8 *dst = m_pL1Cache + (_CacheAddr & 0x3FFFF);
if ((dst != nullptr) && (src != nullptr) && (_MemAddr & 3) == 0 && (_CacheAddr & 3) == 0)
{
@ -333,7 +333,7 @@ u8 *GetPointer(const u32 _Address)
case 0xe:
if (_Address < (0xE0000000 + L1_CACHE_SIZE))
return GetCachePtr() + (_Address & L1_CACHE_MASK);
return m_pL1Cache + (_Address & L1_CACHE_MASK);
else
break;

23
Source/Core/Core/HW/Memmap.h
View File

@ -95,17 +95,6 @@ void WriteUnchecked_U32(const u32 _Data, const u32 _Address);
bool IsRAMAddress(const u32 addr, bool allow_locked_cache = false, bool allow_fake_vmem = false);
inline u8* GetCachePtr() {return m_pL1Cache;}
inline u8* GetMainRAMPtr() {return m_pRAM;}
inline u32 ReadFast32(const u32 _Address)
{
#if _ARCH_32
return Common::swap32(*(u32 *)(base + (_Address & MEMVIEW32_MASK))); // ReadUnchecked_U32(_Address);
#else
return Common::swap32(*(u32 *)(base + _Address));
#endif
}
// used by interpreter to read instructions, uses iCache
u32 Read_Opcode(const u32 _Address);
// this is used by Debugger a lot.
@ -115,11 +104,6 @@ u32 Read_Instruction(const u32 _Address);
// For use by emulator
// Read and write functions
#define NUMHWMEMFUN 64
#define HWSHIFT 10
#define HW_MASK 0x3FF
u8 Read_U8(const u32 _Address);
u16 Read_U16(const u32 _Address);
u32 Read_U32(const u32 _Address);
@ -133,9 +117,6 @@ double Read_F64(const u32 _Address);
u32 Read_U8_ZX(const u32 _Address);
u32 Read_U16_ZX(const u32 _Address);
// used by JIT (Jit64::lXz)
u32 EFB_Read(const u32 addr);
void Write_U8(const u8 _Data, const u32 _Address);
void Write_U16(const u16 _Data, const u32 _Address);
void Write_U32(const u32 _Data, const u32 _Address);
@ -148,7 +129,6 @@ void Write_U64_Swap(const u64 _Data, const u32 _Address);
// Useful helper functions, used by ARM JIT
void Write_F64(const double _Data, const u32 _Address);
void WriteHW_U32(const u32 _Data, const u32 _Address);
void GetString(std::string& _string, const u32 _Address);
void WriteBigEData(const u8 *_pData, const u32 _Address, const size_t size);
@ -169,9 +149,6 @@ enum XCheckTLBFlag
};
u32 TranslateAddress(u32 _Address, XCheckTLBFlag _Flag);
void InvalidateTLBEntry(u32 _Address);
void GenerateDSIException(u32 _EffectiveAdress, bool _bWrite);
void GenerateISIException(u32 _EffectiveAdress);
extern u32 pagetable_base;
extern u32 pagetable_hashmask;
};

11
Source/Core/Core/HW/MemmapFunctions.cpp
View File

@ -71,7 +71,7 @@ inline u64 bswap(u64 val) {return Common::swap64(val);}
// Nasty but necessary. Super Mario Galaxy pointer relies on this stuff.
u32 EFB_Read(const u32 addr)
static u32 EFB_Read(const u32 addr)
{
u32 var = 0;
// Convert address to coordinates. It's possible that this should be done
@ -90,6 +90,8 @@ u32 EFB_Read(const u32 addr)
return var;
}
static void GenerateDSIException(u32 _EffectiveAddress, bool _bWrite);
template <typename T>
inline void ReadFromHardware(T &_var, const u32 em_address, const u32 effective_address, Memory::XCheckTLBFlag flag)
{
@ -232,6 +234,9 @@ inline void WriteToHardware(u32 em_address, const T data, u32 effective_address,
/* These functions are primarily called by the Interpreter functions and are routed to the correct
location through ReadFromHardware and WriteToHardware */
// ----------------
static void GenerateISIException(u32 effective_address);
u32 Read_Opcode(u32 _Address)
{
if (_Address == 0x00000000)
@ -550,7 +555,7 @@ union UPTE2
u32 Hex;
};
void GenerateDSIException(u32 _EffectiveAddress, bool _bWrite)
static void GenerateDSIException(u32 _EffectiveAddress, bool _bWrite)
{
if (_bWrite)
PowerPC::ppcState.spr[SPR_DSISR] = PPC_EXC_DSISR_PAGE | PPC_EXC_DSISR_STORE;
@ -563,7 +568,7 @@ void GenerateDSIException(u32 _EffectiveAddress, bool _bWrite)
}
void GenerateISIException(u32 _EffectiveAddress)
static void GenerateISIException(u32 _EffectiveAddress)
{
// Address of instruction could not be translated
NPC = _EffectiveAddress;

4
Source/Core/Core/PowerPC/JitInterface.cpp
View File

@ -211,7 +211,6 @@ namespace JitInterface
u32 Read_Opcode_JIT(u32 _Address)
{
#ifdef FAST_ICACHE
if (bMMU && !bFakeVMEM && (_Address & Memory::ADDR_MASK_MEM1))
{
_Address = Memory::TranslateAddress(_Address, Memory::FLAG_OPCODE);
@ -228,9 +227,6 @@ namespace JitInterface
inst = Memory::ReadUnchecked_U32(_Address);
else
inst = PowerPC::ppcState.iCache.ReadInstruction(_Address);
#else
u32 inst = Memory::ReadUnchecked_U32(_Address);
#endif
return inst;
}

18
Source/Core/Core/PowerPC/PPCCache.cpp
View File

@ -59,11 +59,9 @@ namespace PowerPC
{
memset(valid, 0, sizeof(valid));
memset(plru, 0, sizeof(plru));
#ifdef FAST_ICACHE
memset(lookup_table, 0xff, sizeof(lookup_table));
memset(lookup_table_ex, 0xff, sizeof(lookup_table_ex));
memset(lookup_table_vmem, 0xff, sizeof(lookup_table_vmem));
#endif
JitInterface::ClearSafe();
}
@ -83,7 +81,6 @@ namespace PowerPC
return;
// invalidates the whole set
u32 set = (addr >> 5) & 0x7f;
#ifdef FAST_ICACHE
for (int i = 0; i < 8; i++)
if (valid[set] & (1<<i))
{
@ -94,7 +91,6 @@ namespace PowerPC
else
lookup_table[((tags[set][i] << 7) | set) & 0xfffff] = 0xff;
}
#endif
valid[set] = 0;
JitInterface::InvalidateICache(addr & ~0x1f, 32);
}
@ -105,7 +101,7 @@ namespace PowerPC
return Memory::ReadUnchecked_U32(addr);
u32 set = (addr >> 5) & 0x7f;
u32 tag = addr >> 12;
#ifdef FAST_ICACHE
u32 t;
if (addr & ICACHE_VMEM_BIT)
{
@ -119,15 +115,7 @@ namespace PowerPC
{
t = lookup_table[(addr>>5) & 0xfffff];
}
#else
u32 t = 0xff;
for (u32 i = 0; i < 8; i++)
if (tags[set][i] == tag && (valid[set] & (1<<i)))
{
t = i;
break;
}
#endif
if (t == 0xff) // load to the cache
{
if (HID0.ILOCK) // instruction cache is locked
@ -140,7 +128,6 @@ namespace PowerPC
// load
u8 *p = Memory::GetPointer(addr & ~0x1f);
memcpy(data[set][t], p, 32);
#ifdef FAST_ICACHE
if (valid[set] & (1<<t))
{
if (tags[set][t] & (ICACHE_VMEM_BIT >> 12))
@ -157,7 +144,6 @@ namespace PowerPC
lookup_table_ex[(addr>>5) & 0x1fffff] = t;
else
lookup_table[(addr>>5) & 0xfffff] = t;
#endif
tags[set][t] = tag;
valid[set] |= 1<<t;
}

4
Source/Core/Core/PowerPC/PPCCache.h
View File

@ -6,8 +6,6 @@
#include "Common/CommonTypes.h"
#define FAST_ICACHE
namespace PowerPC
{
@ -29,11 +27,9 @@ namespace PowerPC
u32 way_from_valid[255];
u32 way_from_plru[128];
#ifdef FAST_ICACHE
u8 lookup_table[1<<20];
u8 lookup_table_ex[1<<21];
u8 lookup_table_vmem[1<<20];
#endif
InstructionCache();
u32 ReadInstruction(u32 addr);