mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2024-11-14 13:27:45 -07:00
dspspy: fix a bug with ConsoleHelper
dspspy: remove some alignment for some vars. (should not have caused issues anyways) dspCodeUtil: pad ucodes converted to headers to 32byte multiples with nops (this is only mimicing what is seen in nintendo ucodes, probably because their's are originating on disc) Common.h: fix typo for gcc version of GC_ALIGNED32 (wtf? how did this work before?!) createtest.pl: add "jmp end_of_test" to the end of generated ucodes. git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3994 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
Shawn Hoffman
parent
2060cae79b
commit
6e61c32495
@ -96,7 +96,7 @@
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#endif
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}
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// Debug definions
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// Debug definitions
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#if defined(_DEBUG)
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#include <crtdbg.h>
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#undef CHECK_HEAP_INTEGRITY
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@ -120,7 +120,7 @@
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#endif
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// Alignment
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#define GC_ALIGNED16(x) __attribute__((aligned(16))) x
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#define GC_ALIGNED32(x) __attribute__((aligned(16))) x
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#define GC_ALIGNED32(x) __attribute__((aligned(32))) x
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#define GC_ALIGNED64(x) __attribute__((aligned(64))) x
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#define GC_ALIGNED16_DECL(x) __attribute__((aligned(16))) x
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#define GC_ALIGNED64_DECL(x) __attribute__((aligned(64))) x
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@ -116,29 +116,26 @@ void GenRandomCode(int size, std::vector<u16> &code)
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void CodeToHeader(const std::vector<u16> &code, std::string _filename,
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const char *name, std::string &header)
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{
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std::vector<u16> code_copy = code;
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// Add some nops at the end to align the size a bit.
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while (code_copy.size() & 7)
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code_copy.push_back(0);
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std::vector<u16> code_padded = code;
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// Pad with nops to 32byte boundary
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while (code_padded.size() & 0x7f)
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code_padded.push_back(0);
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char buffer[1024];
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header.clear();
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header.reserve(code.size() * 4);
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header.reserve(code_padded.size() * 4);
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header.append("#define NUM_UCODES 1\n\n");
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std::string filename;
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SplitPath(_filename, NULL, &filename, NULL);
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header.append(StringFromFormat("const char* UCODE_NAMES[NUM_UCODES] = {\"%s\"};\n\n", filename.c_str()));
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header.append("#ifndef _MSCVER\n");
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header.append("const unsigned short dsp_code[NUM_UCODES][0x1000] = {\n");
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header.append("#else\n");
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header.append("const unsigned short dsp_code[NUM_UCODES][0x1000] __attribute__ ((aligned (64))) = {\n");
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header.append("#endif\n\n");
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header.append("\t{\n\t\t");
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for (u32 j = 0; j < code.size(); j++)
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for (u32 j = 0; j < code_padded.size(); j++)
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{
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if (j && ((j & 15) == 0))
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header.append("\n\t\t");
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sprintf(buffer, "0x%04x, ", code[j]);
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sprintf(buffer, "0x%04x, ", code_padded[j]);
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header.append(buffer);
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}
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header.append("\n\t},\n");
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@ -149,10 +146,18 @@ void CodeToHeader(const std::vector<u16> &code, std::string _filename,
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void CodesToHeader(const std::vector<u16> *codes, const std::vector<std::string>* filenames,
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int numCodes, const char *name, std::string &header)
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{
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std::vector<std::vector<u16> > codes_padded;
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char buffer[1024];
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int reserveSize = 0;
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for(int i = 0; i < numCodes; i++)
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reserveSize += (int)codes[i].size();
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{
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codes_padded.push_back(codes[i]);
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// Pad with nops to 32byte boundary
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while (codes_padded.at(i).size() & 0x7f)
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codes_padded.at(i).push_back(0);
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reserveSize += (int)codes_padded.at(i).size();
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}
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header.clear();
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@ -169,27 +174,19 @@ void CodesToHeader(const std::vector<u16> *codes, const std::vector<std::string>
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header.append(buffer);
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}
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header.append("};\n\n");
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header.append("#ifndef _MSCVER\n");
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header.append("const unsigned short dsp_code[NUM_UCODES][0x1000] = {\n");
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header.append("#else\n");
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header.append("const unsigned short dsp_code[NUM_UCODES][0x1000] __attribute__ ((aligned (64))) = {\n");
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header.append("#endif\n\n");
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for(int i = 0; i < numCodes; i++) {
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for(int i = 0; i < numCodes; i++)
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{
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if(codes[i].size() == 0)
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continue;
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std::vector<u16> code_copy = codes[i];
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// Add some nops at the end to align the size a bit.
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while (code_copy.size() & 7)
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code_copy.push_back(0);
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header.append("\t{\n\t\t");
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for (u32 j = 0; j < codes[i].size(); j++)
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for (u32 j = 0; j < codes_padded.at(i).size(); j++)
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{
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if (j && ((j & 15) == 0))
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header.append("\n\t\t");
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sprintf(buffer, "0x%04x, ", codes[i][j]);
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sprintf(buffer, "0x%04x, ", codes_padded.at(i).at(j));
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header.append(buffer);
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}
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header.append("\n\t},\n");
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@ -52,7 +52,7 @@ u16 dsp_dmem_read(u16 addr)
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return g_dsp.dram[addr & DSP_DRAM_MASK];
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case 0x1: // 1xxx COEF
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// DEBUG_LOG(DSPLLE, "%04x : Coef Read @ %04x", g_dsp.pc, addr);
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DEBUG_LOG(DSPLLE, "%04x : Coef Read @ %04x", g_dsp.pc, addr);
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return g_dsp.coef[addr & DSP_COEF_MASK];
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case 0xf: // Fxxx HW regs
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@ -76,7 +76,8 @@ inline void CON_BlankRow(const int y)
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int columns = 0, rows = 0;
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CON_GetMetrics(&columns, &rows);
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char* blank = new char[columns];
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std::fill(blank, &blank[columns], ' ');
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std::fill(blank, blank + columns, ' ');
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blank[columns] = '\0';
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CON_Printf(0, y, "%s", blank);
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delete blank;
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}
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@ -19,6 +19,10 @@
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void IDSP::SendTask(void *addr, u16 iram_addr, u16 len, u16 start)
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{
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// addr main ram addr 4byte aligned (1 Gekko word)
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// iram_addr dsp addr 4byte aligned (2 DSP words)
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// len block length in bytes multiple of 4
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// start dsp iram entry point
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while (CheckMailTo());
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SendMailTo(0x80F3A001);
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while (CheckMailTo());
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@ -62,7 +62,7 @@
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// #include "virtual_dsp.h"
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// Used for communications with the DSP, such as dumping registers etc.
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u16 dspbuffer[16 * 1024] __attribute__ ((aligned (0x4000)));
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u16 dspbuffer[16 * 1024];
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static void *xfb = NULL;
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void (*reboot)() = (void(*)())0x80001800;
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@ -327,8 +327,11 @@ void handle_dsp_mail(void)
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DCFlushRange(dspbufC, 0x2000);
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// Then send the code.
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DCFlushRange((void *)dsp_code[curUcode], 0x2000);
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// Fill whole iram with code, entry point is just after exception vectors...0x10
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real_dsp.SendTask((void *)MEM_VIRTUAL_TO_PHYSICAL(dsp_code[curUcode]), 0, 4000, 0x10);
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// DMA ucode to iram base, entry point is just after exception vectors...0x10
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// (shuffle2) 5256 is the highest I could get the dma block length to on my wii - still needs to be looked into
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// for the tstaxh test, 5256 only yields up to step 325. There are 532 send_backs in the ucode, and it takes up
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// almost all of the iram.
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real_dsp.SendTask((void *)MEM_VIRTUAL_TO_PHYSICAL(dsp_code[curUcode]), 0, 5256, 0x10);
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runningUcode = curUcode + 1;
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@ -338,7 +341,7 @@ void handle_dsp_mail(void)
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else if ((mail & 0xffff0000) == 0x8bad0000)
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{
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// dsp_base.inc is reporting an exception happened
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CON_PrintRow(4, 25, "%s caused exception %x", UCODE_NAMES[curUcode], mail & 0xff);
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CON_PrintRow(4, 25, "%s caused exception %x at step %i", UCODE_NAMES[curUcode], mail & 0xff, dsp_steps);
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}
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else if (mail == 0x8888dead)
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{
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@ -426,13 +429,11 @@ void dump_all_ucodes(void)
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// Then write all the dumps.
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written += fwrite(dspreg_out, 1, dsp_steps * 32 * 2, f);
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fclose(f);
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char temp[100];
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sprintf(temp, "Dump Successful. Wrote %d bytes, steps: %d", written, dsp_steps);
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UpdateLastMessage(temp);
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CON_PrintRow(4, 24, "Dump %i Successful. Wrote %d bytes, steps: %d", UCodeToDump, written, dsp_steps);
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}
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else
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{
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UpdateLastMessage("SD Write Error");
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CON_PrintRow(4, 24, "Dump %i Failed", UCodeToDump);
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break;
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}
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}
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@ -94,6 +94,7 @@ for(my $i = 0;$i < scalar(@cmdList);$i++) {
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open(OUTPUT, ">$name$j.tst");
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print OUTPUT generateSRFull($header, $body, $j*$ucodes,
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($j+1)*$ucodes-1);
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print OUTPUT "jmp end_of_test";
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close(OUTPUT);
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print NAMES "$name$j.tst";
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@ -1,186 +1,186 @@
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; This ucode can copy the dsp instruction rom and coefficient table.
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; irom:
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; 0x8000 in instruction space
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; coef:
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; 0x1000 in data space
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;
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; Both irom and coef are 0x1000 words in length - remember, DSP
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; uses 16bit words
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;
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; The DSP has two address spaces, to load data from instruction
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; space you need to use 'i'-prefixed instructions.
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; This ucode can copy the dsp instruction rom and coefficient table.
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; irom:
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; 0x8000 in instruction space
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; coef:
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; 0x1000 in data space
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;
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; Both irom and coef are 0x1000 words in length - remember, DSP
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; uses 16bit words
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;
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; The DSP has two address spaces, to load data from instruction
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; space you need to use 'i'-prefixed instructions.
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/********************************/
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/** HANDY THANGERS **/
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/********************************/
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; External
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MEM_BASE: equ 0x0000
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MEM_HI: equ MEM_BASE
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MEM_LO: equ MEM_BASE+1
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; DSP
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DRAM_BASE: equ 0x0000
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; Config reg controls dma behavior
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/********************************/
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; External
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MEM_BASE: equ 0x0000
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MEM_HI: equ MEM_BASE
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MEM_LO: equ MEM_BASE+1
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; DSP
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DRAM_BASE: equ 0x0000
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; Config reg controls dma behavior
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CR_TO_DSP: equ 0
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CR_TO_CPU: equ 1
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CR_IRAM: equ 2
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CR_DRAM: equ 0
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IROM_BASE: equ 0x8000
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COEF_BASE: equ 0x1000
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DUMP_SIZE: equ 0x2000 ; in bytes!
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CR_TO_CPU: equ 1
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CR_IRAM: equ 2
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CR_DRAM: equ 0
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IROM_BASE: equ 0x8000
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COEF_BASE: equ 0x1000
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DUMP_SIZE: equ 0x2000 ; in bytes!
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/**************************************************************/
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/* CODE START */
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/**************************************************************/
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; iram 0x00 - Exception vectors
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; 8 vectors, 2 opcodes each
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jmp exception0
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jmp exception1
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jmp exception2
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jmp exception3
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jmp exception4
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jmp exception5
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jmp exception6
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jmp exception7
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; iram 0x10 - Our entry point
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sbset #0x02
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sbset #0x03
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sbclr #0x04
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sbset #0x05
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sbset #0x06
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; ???
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s16
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lri $CR, #0x00ff
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/**************************************************************/
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; iram 0x00 - Exception vectors
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; 8 vectors, 2 opcodes each
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jmp exception0
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jmp exception1
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jmp exception2
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jmp exception3
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jmp exception4
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jmp exception5
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jmp exception6
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jmp exception7
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; iram 0x10 - Our entry point
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sbset #0x02
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sbset #0x03
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sbclr #0x04
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sbset #0x05
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sbset #0x06
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; ???
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s16
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lri $CR, #0x00ff
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/**************************************************************/
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/* MAIN */
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/**************************************************************/
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; This ucode is meant only to dump the ROMs, and as such is
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; self-contained and skimpy
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main:
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clr $acc1
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clr $acc0
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; This consumes ALL of dram! We must be careful until we dma it!
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call copy_irom_to_dram
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; Send mail saying irom dump is done
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call wait_for_dsp_mbox
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si @DMBH, #0x8888
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si @DMBL, #0xc0de
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si @DIRQ, #0x0001
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; Get address to dma to, dma, and wait till done
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call dma_dram_to_cmbl
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; Now we can start over for the coef
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call copy_coef_to_dram
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; Send mail saying coef dump is done
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call wait_for_dsp_mbox
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si @DMBH, #0x8888
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si @DMBL, #0xda7a
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si @DIRQ, #0x0001
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; Get address to dma to, dma, and wait till done
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call dma_dram_to_cmbl
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; Die
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do_halt:
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halt
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/**************************************************************/
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; This ucode is meant only to dump the ROMs, and as such is
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; self-contained and skimpy
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main:
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clr $acc1
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clr $acc0
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; This consumes ALL of dram! We must be careful until we dma it!
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call copy_irom_to_dram
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; Send mail saying irom dump is done
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call wait_for_dsp_mbox
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si @DMBH, #0x8888
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si @DMBL, #0xc0de
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si @DIRQ, #0x0001
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; Get address to dma to, dma, and wait till done
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call dma_dram_to_cmbl
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; Now we can start over for the coef
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call copy_coef_to_dram
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; Send mail saying coef dump is done
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call wait_for_dsp_mbox
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si @DMBH, #0x8888
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si @DMBL, #0xda7a
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si @DIRQ, #0x0001
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; Get address to dma to, dma, and wait till done
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call dma_dram_to_cmbl
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; Die
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do_halt:
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halt
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/**************************************************************/
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/* HELPER FUNCTIONS */
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/**************************************************************/
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/**************************************************************/
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/********************************/
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/** DUMPING FUNCTIONS **/
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/********************************/
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/********************************/
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; Dump irom from 0x8000 in instruction space
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copy_irom_to_dram:
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lri $ar0, #IROM_BASE
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lri $ar1, #DRAM_BASE
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lri $ar2, #DUMP_SIZE/2 ; each iteration copies a word
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bloop $ar2, copy_irom_to_dram_end
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ilrri $ac0.m, @$ar0
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; Now ac0.m is 16bits of irom!
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srri @$ar1, $ac0.m
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copy_irom_to_dram_end:
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nop
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ret
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lri $ar0, #IROM_BASE
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lri $ar1, #DRAM_BASE
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lri $ar2, #DUMP_SIZE/2 ; each iteration copies a word
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bloop $ar2, copy_irom_to_dram_end
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ilrri $ac0.m, @$ar0
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; Now ac0.m is 16bits of irom!
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srri @$ar1, $ac0.m
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copy_irom_to_dram_end:
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nop
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ret
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; Dump coef from 0x1000 in data space
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copy_coef_to_dram:
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lri $ar0, #COEF_BASE
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lri $ar1, #DRAM_BASE
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lri $ar2, #DUMP_SIZE/2 ; each iteration copies a word
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bloop $ar2, copy_coef_to_dram_end
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lrri $ac0.m, @$ar0
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; Now ac0.m is 16bits of coef!
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srri @$ar1, $ac0.m
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copy_coef_to_dram_end:
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nop
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ret
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lri $ar2, #DUMP_SIZE/2 ; each iteration copies a word
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bloop $ar2, copy_coef_to_dram_end
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lrri $ac0.m, @$ar0
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; Now ac0.m is 16bits of coef!
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srri @$ar1, $ac0.m
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copy_coef_to_dram_end:
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nop
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ret
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/********************************/
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/** DMA **/
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/********************************/
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; DMA implementation which does not write to dram
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; We take advantage of the fact that we know the mail is going to
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; contain the address which we should dma to
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dma_dram_to_cmbl:
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call wait_for_cpu_mbox
|
||||
lrs $ac0.m, @CMBL
|
||||
andi $ac1.m, #0x7fff
|
||||
|
||||
; Directly do dma; writing the length kicks it off
|
||||
sr @DSMAH, $ac1.m
|
||||
sr @DSMAL, $ac0.m
|
||||
si @DSPA, #DRAM_BASE
|
||||
si @DSCR, #(CR_TO_CPU|CR_DRAM)
|
||||
si @DSBL, #DUMP_SIZE
|
||||
|
||||
; Waits for previous DMA to complete by watching a bit in DSCR.
|
||||
wait_dma:
|
||||
lrs $ac1.m, @DSCR
|
||||
andcf $ac1.m, #0x0004
|
||||
jlz wait_dma
|
||||
ret
|
||||
|
||||
/********************************/
|
||||
; DMA implementation which does not write to dram
|
||||
; We take advantage of the fact that we know the mail is going to
|
||||
; contain the address which we should dma to
|
||||
dma_dram_to_cmbl:
|
||||
call wait_for_cpu_mbox
|
||||
lrs $ac0.m, @CMBL
|
||||
andi $ac1.m, #0x7fff
|
||||
|
||||
; Directly do dma; writing the length kicks it off
|
||||
sr @DSMAH, $ac1.m
|
||||
sr @DSMAL, $ac0.m
|
||||
si @DSPA, #DRAM_BASE
|
||||
si @DSCR, #(CR_TO_CPU|CR_DRAM)
|
||||
si @DSBL, #DUMP_SIZE
|
||||
|
||||
; Waits for previous DMA to complete by watching a bit in DSCR.
|
||||
wait_dma:
|
||||
lrs $ac1.m, @DSCR
|
||||
andcf $ac1.m, #0x0004
|
||||
jlz wait_dma
|
||||
ret
|
||||
|
||||
/********************************/
|
||||
/** MAILBOX **/
|
||||
/********************************/
|
||||
; Waits for a mail to arrive in the DSP in-mailbox.
|
||||
wait_for_dsp_mbox:
|
||||
lrs $ac1.m, @DMBH
|
||||
andcf $ac1.m, #0x8000
|
||||
jlz wait_for_dsp_mbox
|
||||
ret
|
||||
|
||||
; Waits for the CPU to grab a mail that we just sent from the DSP.
|
||||
wait_for_cpu_mbox:
|
||||
lrs $ac1.m, @CMBH
|
||||
andcf $ac1.m, #0x8000
|
||||
jlnz wait_for_cpu_mbox
|
||||
ret
|
||||
|
||||
/********************************/
|
||||
; Waits for a mail to arrive in the DSP in-mailbox.
|
||||
wait_for_dsp_mbox:
|
||||
lrs $ac1.m, @DMBH
|
||||
andcf $ac1.m, #0x8000
|
||||
jlz wait_for_dsp_mbox
|
||||
ret
|
||||
|
||||
; Waits for the CPU to grab a mail that we just sent from the DSP.
|
||||
wait_for_cpu_mbox:
|
||||
lrs $ac1.m, @CMBH
|
||||
andcf $ac1.m, #0x8000
|
||||
jlnz wait_for_cpu_mbox
|
||||
ret
|
||||
|
||||
/********************************/
|
||||
/** EXCEPTION HANDLERS **/
|
||||
/********************************/
|
||||
; ...zey do nutzing!
|
||||
exception0:
|
||||
rti
|
||||
exception1:
|
||||
rti
|
||||
exception2:
|
||||
rti
|
||||
exception3:
|
||||
rti
|
||||
exception4:
|
||||
rti
|
||||
exception5:
|
||||
rti
|
||||
exception6:
|
||||
rti
|
||||
exception7:
|
||||
rti
|
||||
/********************************/
|
||||
; ...zey do nutzing!
|
||||
exception0:
|
||||
rti
|
||||
exception1:
|
||||
rti
|
||||
exception2:
|
||||
rti
|
||||
exception3:
|
||||
rti
|
||||
exception4:
|
||||
rti
|
||||
exception5:
|
||||
rti
|
||||
exception6:
|
||||
rti
|
||||
exception7:
|
||||
rti
|
||||
|
||||
@ -70,6 +70,7 @@ IUCode* UCodeFactory(u32 _CRC, CMailHandler& _rMailHandler)
|
||||
return new CUCode_Zelda(_rMailHandler, _CRC);
|
||||
|
||||
// WII CRCs
|
||||
case 0x2ea36ce6: // Wii THP demo
|
||||
case 0xb7eb9a9c: // Wii Pikmin - PAL
|
||||
case 0xeaeb38cc: // Wii Pikmin 2 - PAL
|
||||
case 0x6c3f6f94: // zelda - PAL
|
||||
|
||||
Loading…
Reference in New Issue
Block a user