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synced 2024-11-14 13:27:45 -07:00
Force the result of single precision arithmetic to have single precision only, also in jit. That is, another attempt at fixing the FPU bug in Zelda.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@251 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -24,6 +24,7 @@
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#include "Jit.h"
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#include "JitCache.h"
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#include "JitRegCache.h"
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#include "Jit_Util.h"
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#define INSTRUCTION_START
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// #define INSTRUCTION_START Default(inst); return;
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@ -70,9 +71,9 @@ namespace Jit64
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MOVSD(fpr.RX(d), Gen::R(XMM0));
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}
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if (dupe) {
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ForceSinglePrecisionS(fpr.RX(d));
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MOVDDUP(fpr.RX(d), fpr.R(d));
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}
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//fpr.SetDirty(fpr.RX(d));
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fpr.UnlockAll();
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}
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@ -106,6 +107,9 @@ namespace Jit64
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if (inst.Rc) {
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Default(inst); return;
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}
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bool single_precision = inst.OPCD == 59;
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int a = inst.FA;
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int b = inst.FB;
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int c = inst.FC;
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@ -137,7 +141,12 @@ namespace Jit64
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fpr.LoadToX64(d, false);
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//YES it is necessary to dupe the result :(
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//TODO : analysis - does the top reg get used? If so, dupe, if not, don't.
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MOVDDUP(fpr.RX(d), Gen::R(XMM0));
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if (single_precision) {
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ForceSinglePrecisionS(XMM0);
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MOVDDUP(fpr.RX(d), R(XMM0));
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} else {
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MOVSD(fpr.RX(d), R(XMM0));
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}
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fpr.UnlockAll();
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}
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@ -127,4 +127,13 @@ void WriteFloatToConstRamAddress(const Gen::X64Reg& xmm_reg, u32 address)
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#endif
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}
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void ForceSinglePrecisionS(X64Reg xmm) {
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CVTSD2SS(xmm, R(xmm));
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CVTSS2SD(xmm, R(xmm));
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}
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void ForceSinglePrecisionP(X64Reg xmm) {
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CVTPD2PS(xmm, R(xmm));
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CVTPS2PD(xmm, R(xmm));
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}
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} // namespace
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@ -30,4 +30,7 @@ void SafeWriteRegToReg(Gen::X64Reg reg_value, Gen::X64Reg reg_addr, int accessSi
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void WriteToConstRamAddress(int accessSize, const Gen::OpArg& arg, u32 address);
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void WriteFloatToConstRamAddress(const Gen::X64Reg& xmm_reg, u32 address);
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void ForceSinglePrecisionS(X64Reg xmm);
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void ForceSinglePrecisionP(X64Reg xmm);
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} // namespace
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