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[ARM] fctiwx implementation.
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commit
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@ -210,6 +210,7 @@ public:
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void fmrx(UGeckoInstruction _inst);
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void fmaddsx(UGeckoInstruction _inst);
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void fmaddx(UGeckoInstruction _inst);
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void fctiwx(UGeckoInstruction _inst);
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void fctiwzx(UGeckoInstruction _inst);
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void fcmpo(UGeckoInstruction _inst);
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void fcmpu(UGeckoInstruction _inst);
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@ -38,6 +38,113 @@ void JitArm::Helper_UpdateCR1(ARMReg value)
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PanicAlert("CR1");
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}
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void JitArm::fctiwx(UGeckoInstruction inst)
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{
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INSTRUCTION_START
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JITDISABLE(bJITFloatingPointOff)
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u32 b = inst.FB;
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u32 d = inst.FD;
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ARMReg vB = fpr.R0(b);
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ARMReg vD = fpr.R0(d);
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ARMReg V0 = fpr.GetReg();
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ARMReg V1 = fpr.GetReg();
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ARMReg V2 = fpr.GetReg();
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ARMReg rA = gpr.GetReg();
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ARMReg fpscrReg = gpr.GetReg();
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FixupBranch DoneMax, DoneMin;
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LDR(fpscrReg, R9, PPCSTATE_OFF(fpscr));
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MOVI2R(rA, (u32)minmaxFloat);
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// Check if greater than max float
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{
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VLDR(V0, rA, 8); // Load Max
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VCMPE(vB, V0);
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VMRS(_PC); // Loads in to APSR
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FixupBranch noException = B_CC(CC_LE);
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VMOV(vD, V0); // Set to max
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SetFPException(fpscrReg, FPSCR_VXCVI);
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DoneMax = B();
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SetJumpTarget(noException);
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}
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// Check if less than min float
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{
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VLDR(V0, rA, 0);
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VCMPE(vB, V0);
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VMRS(_PC);
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FixupBranch noException = B_CC(CC_GE);
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VMOV(vD, V0);
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SetFPException(fpscrReg, FPSCR_VXCVI);
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DoneMin = B();
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SetJumpTarget(noException);
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}
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// Within ranges, convert to integer
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// Set rounding mode first
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// PPC <-> ARM rounding modes
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// 0, 1, 2, 3 <-> 0, 3, 1, 2
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ARMReg rB = gpr.GetReg();
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VMRS(rA);
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// Bits 22-23
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BIC(rA, rA, Operand2(3, 5));
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LDR(rB, R9, PPCSTATE_OFF(fpscr));
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AND(rB, rB, 0x3); // Get the FPSCR rounding bits
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CMP(rB, 1);
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SetCC(CC_EQ); // zero
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ORR(rA, rA, Operand2(3, 5));
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SetCC(CC_NEQ);
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CMP(rB, 2); // +inf
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SetCC(CC_EQ);
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ORR(rA, rA, Operand2(1, 5));
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SetCC(CC_NEQ);
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CMP(rB, 3); // -inf
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SetCC(CC_EQ);
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ORR(rA, rA, Operand2(2, 5));
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SetCC();
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VMSR(rA);
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ORR(rA, rA, Operand2(3, 5));
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VCVT(vD, vB, TO_INT | IS_SIGNED);
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VMSR(rA);
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gpr.Unlock(rB);
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VCMPE(vD, vB);
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VMRS(_PC);
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SetCC(CC_EQ);
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BIC(fpscrReg, fpscrReg, FRFIMask);
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FixupBranch DoneEqual = B();
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SetCC();
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SetFPException(fpscrReg, FPSCR_XX);
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ORR(fpscrReg, fpscrReg, FIMask);
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VABS(V1, vB);
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VABS(V2, vD);
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VCMPE(V2, V1);
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VMRS(_PC);
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SetCC(CC_GT);
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ORR(fpscrReg, fpscrReg, FRMask);
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SetCC();
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SetJumpTarget(DoneEqual);
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SetJumpTarget(DoneMax);
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SetJumpTarget(DoneMin);
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MOVI2R(rA, (u32)&doublenum);
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VLDR(V0, rA, 0);
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NEONXEmitter nemit(this);
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nemit.VORR(vD, vD, V0);
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if (inst.Rc) Helper_UpdateCR1(vD);
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STR(fpscrReg, R9, PPCSTATE_OFF(fpscr));
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gpr.Unlock(rA);
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gpr.Unlock(fpscrReg);
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fpr.Unlock(V0);
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fpr.Unlock(V1);
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fpr.Unlock(V2);
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}
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void JitArm::fctiwzx(UGeckoInstruction inst)
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{
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INSTRUCTION_START
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@ -349,7 +349,7 @@ static GekkoOPTemplate table63[] =
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{264, &JitArm::fabsx}, //"fabsx", OPTYPE_FPU, FL_RC_BIT_F}},
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{32, &JitArm::fcmpo}, //"fcmpo", OPTYPE_FPU, FL_RC_BIT_F}},
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{0, &JitArm::fcmpu}, //"fcmpu", OPTYPE_FPU, FL_RC_BIT_F}},
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{14, &JitArm::Default}, //"fctiwx", OPTYPE_FPU, FL_RC_BIT_F}},
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{14, &JitArm::fctiwx}, //"fctiwx", OPTYPE_FPU, FL_RC_BIT_F}},
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{15, &JitArm::fctiwzx}, //"fctiwzx", OPTYPE_FPU, FL_RC_BIT_F}},
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{72, &JitArm::fmrx}, //"fmrx", OPTYPE_FPU, FL_RC_BIT_F}},
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{136, &JitArm::fnabsx}, //"fnabsx", OPTYPE_FPU, FL_RC_BIT_F}},
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