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Fix the dirty bit and make the register cache use it to be a bit more clever:

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it skips storing a register back to memory if its value hasn't changed. 
This happens with stuff like compares and fast memory loads.

This is the first in a series of enhancements I have in my tree for the 
jit that I plan to commit over the next few hours.  I'm likely to 
cause some breakage, so if you see regrassions, please report them; if 
you can track them down to a specific revision, that would be very 
helpful.  I'm trying to make the changes small to allow pinpointing 
regressions more easily.



git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@1252 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
magumagu9 2008-11-22 20:49:58 +00:00
parent a534971d15
commit a6d5a7ea9e
1 changed files with 6 additions and 2 deletions
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8
Source/Core/Core/Src/PowerPC/Jit64/JitRegCache.cpp
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@ -198,6 +198,7 @@ namespace Jit64
if (regs[preg].away && regs[preg].location.IsSimpleReg())
{
xregs[regs[preg].location.GetSimpleReg()].free = true;
xregs[regs[preg].location.GetSimpleReg()].dirty = false;
regs[preg].away = false;
}
}
@ -291,7 +292,7 @@ namespace Jit64
if (xlocks[xr]) PanicAlert("GetFreeXReg returned locked register");
xregs[xr].free = false;
xregs[xr].ppcReg = i;
xregs[xr].dirty = makeDirty;
xregs[xr].dirty = makeDirty || regs[i].location.IsImm();
OpArg newloc = ::Gen::R(xr);
if (doLoad || regs[i].location.IsImm())
MOV(32, newloc, regs[i].location);
@ -321,11 +322,13 @@ namespace Jit64
{
if (regs[i].away)
{
bool doStore = true;
if (regs[i].location.IsSimpleReg())
{
X64Reg xr = RX(i);
xregs[xr].free = true;
xregs[xr].ppcReg = -1;
doStore = xregs[xr].dirty;
xregs[xr].dirty = false;
}
else
@ -333,7 +336,8 @@ namespace Jit64
//must be immediate - do nothing
}
OpArg newLoc = GetDefaultLocation(i);
MOV(32, newLoc, regs[i].location);
if (doStore)
MOV(32, newLoc, regs[i].location);
regs[i].location = newLoc;
regs[i].away = false;
}