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Jit64: Disable the fast address check if fastmem is disabled.
This was a huge speedup with disabled fastmem, but it still requires the fastmem arena. So let's disable it for now, even if this commit has a huge performance hit with disabled fastmem.
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@ -371,7 +371,7 @@ void EmuCodeBlock::SafeLoadToReg(X64Reg reg_value, const Gen::OpArg& opAddress,
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FixupBranch exit;
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const bool dr_set = (flags & SAFE_LOADSTORE_DR_ON) || MSR.DR;
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const bool fast_check_address = !slowmem && dr_set;
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const bool fast_check_address = !slowmem && dr_set && m_jit.jo.fastmem_arena;
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if (fast_check_address)
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{
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FixupBranch slow = CheckIfSafeAddress(R(reg_value), reg_addr, registersInUse);
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@ -435,7 +435,7 @@ void EmuCodeBlock::SafeLoadToRegImmediate(X64Reg reg_value, u32 address, int acc
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BitSet32 registersInUse, bool signExtend)
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{
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// If the address is known to be RAM, just load it directly.
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if (PowerPC::IsOptimizableRAMAddress(address))
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if (m_jit.jo.fastmem_arena && PowerPC::IsOptimizableRAMAddress(address))
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{
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UnsafeLoadToReg(reg_value, Imm32(address), accessSize, 0, signExtend);
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return;
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@ -539,7 +539,7 @@ void EmuCodeBlock::SafeWriteRegToReg(OpArg reg_value, X64Reg reg_addr, int acces
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FixupBranch exit;
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const bool dr_set = (flags & SAFE_LOADSTORE_DR_ON) || MSR.DR;
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const bool fast_check_address = !slowmem && dr_set;
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const bool fast_check_address = !slowmem && dr_set && m_jit.jo.fastmem_arena;
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if (fast_check_address)
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{
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FixupBranch slow = CheckIfSafeAddress(reg_value, reg_addr, registersInUse);
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@ -641,7 +641,7 @@ bool EmuCodeBlock::WriteToConstAddress(int accessSize, OpArg arg, u32 address,
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m_jit.js.fifoBytesSinceCheck += accessSize >> 3;
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return false;
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}
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else if (PowerPC::IsOptimizableRAMAddress(address))
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else if (m_jit.jo.fastmem_arena && PowerPC::IsOptimizableRAMAddress(address))
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{
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WriteToConstRamAddress(accessSize, arg, address);
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return false;
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