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[ARM] Add NEON VORR and fix encoding on NEON VEOR. Remove VMRS_APSR because it is the same as VMRS(PC)

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This commit is contained in:
Ryan Houdek 2013-09-16 07:47:49 +00:00
parent f0fc611f15
commit beb41a8f56
2 changed files with 14 additions and 4 deletions
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16
Source/Core/Common/Src/ArmEmitter.cpp
View File

@ -1069,9 +1069,6 @@ void ARMXEmitter::VSTR(ARMReg Src, ARMReg Base, s16 offset)
}
}
void ARMXEmitter::VMRS_APSR() {
Write32(condition | 0xEF10A10 | (15 << 12));
}
void ARMXEmitter::VMRS(ARMReg Rt) {
Write32(condition | (0xEF << 20) | (1 << 16) | (Rt << 12) | 0xA10);
}
@ -1339,12 +1336,25 @@ void NEONXEmitter::VEOR(ARMReg Vd, ARMReg Vn, ARMReg Vm)
{
bool register_quad = Vd >= Q0;
Vd = SubBase(Vd);
Vn = SubBase(Vn);
Vm = SubBase(Vm);
Write32((0xF3 << 24) | ((Vd & 0x10) << 18) | ((Vn & 0xF) << 16)
| ((Vd & 0xF) << 12) | (1 << 8) | ((Vn & 0x10) << 3)
| (register_quad << 6) | ((Vm & 0x10) << 1) | (1 << 4) | (Vm & 0xF));
}
void NEONXEmitter::VORR(ARMReg Vd, ARMReg Vn, ARMReg Vm)
{
bool register_quad = Vd >= Q0;
Vd = SubBase(Vd);
Vn = SubBase(Vn);
Vm = SubBase(Vm);
Write32((0xF2 << 24) | (0x1 << 21) | ((Vd & 0x10) << 18) | ((Vn & 0xF) << 16)
| ((Vd & 0xF) << 12) | (1 << 8) | ((Vn & 0x10) << 3)
| (register_quad << 6) | ((Vm & 0x10) << 1) | (1 << 4) | (Vm & 0xF));
}
}

2
Source/Core/Common/Src/ArmEmitter.h
View File

@ -561,7 +561,6 @@ public:
void VMOV(ARMReg Dest, ARMReg Src);
void VCVT(ARMReg Dest, ARMReg Src, int flags);
void VMRS_APSR();
void VMRS(ARMReg Rt);
void VMSR(ARMReg Rt);
@ -636,6 +635,7 @@ public:
void VREV16(NEONElementType Size, ARMReg Vd, ARMReg Vm);
void VEOR(ARMReg Vd, ARMReg Vn, ARMReg Vm);
void VORR(ARMReg Vd, ARMReg Vn, ARMReg Vm);
void VLD1(NEONElementType Size, ARMReg Vd, ARMReg Rn, NEONAlignment align = ALIGN_NONE, ARMReg Rm = _PC);
void VLD2(NEONElementType Size, ARMReg Vd, ARMReg Rn, NEONAlignment align = ALIGN_NONE, ARMReg Rm = _PC);