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[ARM-JITArmIL] Begin merging of the two IL cores in to a common source base.

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This commit is contained in:
Ryan Houdek 2013-10-08 19:23:37 +00:00
parent a0f2183424
commit ce5dbfe7a7
15 changed files with 226 additions and 241 deletions
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7
Source/Core/Core/CMakeLists.txt
View File

@ -168,6 +168,13 @@ set(SRCS Src/ActionReplay.cpp
Src/PowerPC/JitCommon/JitBase.cpp
Src/PowerPC/JitCommon/JitCache.cpp
Src/PowerPC/JitILCommon/IR.cpp
Src/PowerPC/JitILCommon/JitILBase_Branch.cpp
Src/PowerPC/JitILCommon/JitILBase_LoadStore.cpp
Src/PowerPC/JitILCommon/JitILBase_SystemRegisters.cpp
Src/PowerPC/JitILCommon/JitILBase_LoadStoreFloating.cpp
Src/PowerPC/JitILCommon/JitILBase_LoadStorePaired.cpp
Src/PowerPC/JitILCommon/JitILBase_Paired.cpp
Src/PowerPC/JitILCommon/JitILBase_FloatingPoint.cpp
)
if(NOT _M_GENERIC)

97
Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h
View File

@ -24,7 +24,8 @@
#include "../JitCommon/Jit_Util.h"
#include "x64Emitter.h"
#include "x64Analyzer.h"
#include "IR.h"
#include "../JitILCommon/JitILBase.h"
#include "../JitILCommon/IR.h"
#include "../JitCommon/JitBase.h"
#include "JitILAsm.h"
@ -44,7 +45,7 @@
#define DISABLE64
#endif
class JitIL : public Jitx86Base
class JitIL : public JitILBase, public Jitx86Base
{
private:
@ -125,98 +126,6 @@ public:
void DynaRunTable31(UGeckoInstruction _inst);
void DynaRunTable59(UGeckoInstruction _inst);
void DynaRunTable63(UGeckoInstruction _inst);
void addx(UGeckoInstruction inst);
void boolX(UGeckoInstruction inst);
void mulli(UGeckoInstruction inst);
void mulhwux(UGeckoInstruction inst);
void mullwx(UGeckoInstruction inst);
void divwux(UGeckoInstruction inst);
void srawix(UGeckoInstruction inst);
void srawx(UGeckoInstruction inst);
void addex(UGeckoInstruction inst);
void addzex(UGeckoInstruction inst);
void extsbx(UGeckoInstruction inst);
void extshx(UGeckoInstruction inst);
void sc(UGeckoInstruction _inst);
void rfi(UGeckoInstruction _inst);
void bx(UGeckoInstruction inst);
void bclrx(UGeckoInstruction _inst);
void bcctrx(UGeckoInstruction _inst);
void bcx(UGeckoInstruction inst);
void mtspr(UGeckoInstruction inst);
void mfspr(UGeckoInstruction inst);
void mtmsr(UGeckoInstruction inst);
void mfmsr(UGeckoInstruction inst);
void mftb(UGeckoInstruction inst);
void mtcrf(UGeckoInstruction inst);
void mfcr(UGeckoInstruction inst);
void mcrf(UGeckoInstruction inst);
void crXX(UGeckoInstruction inst);
void reg_imm(UGeckoInstruction inst);
void ps_sel(UGeckoInstruction inst);
void ps_mr(UGeckoInstruction inst);
void ps_sign(UGeckoInstruction inst); //aggregate
void ps_arith(UGeckoInstruction inst); //aggregate
void ps_mergeXX(UGeckoInstruction inst);
void ps_maddXX(UGeckoInstruction inst);
void ps_rsqrte(UGeckoInstruction inst);
void ps_sum(UGeckoInstruction inst);
void ps_muls(UGeckoInstruction inst);
void fp_arith_s(UGeckoInstruction inst);
void fcmpx(UGeckoInstruction inst);
void fmrx(UGeckoInstruction inst);
void cmpXX(UGeckoInstruction inst);
void cntlzwx(UGeckoInstruction inst);
void lfs(UGeckoInstruction inst);
void lfd(UGeckoInstruction inst);
void stfd(UGeckoInstruction inst);
void stfs(UGeckoInstruction inst);
void stfsx(UGeckoInstruction inst);
void psq_l(UGeckoInstruction inst);
void psq_st(UGeckoInstruction inst);
void fmaddXX(UGeckoInstruction inst);
void fsign(UGeckoInstruction inst);
void stX(UGeckoInstruction inst); //stw sth stb
void lXz(UGeckoInstruction inst);
void lbzu(UGeckoInstruction inst);
void lha(UGeckoInstruction inst);
void rlwinmx(UGeckoInstruction inst);
void rlwimix(UGeckoInstruction inst);
void rlwnmx(UGeckoInstruction inst);
void negx(UGeckoInstruction inst);
void slwx(UGeckoInstruction inst);
void srwx(UGeckoInstruction inst);
void dcbst(UGeckoInstruction inst);
void dcbz(UGeckoInstruction inst);
void lfsx(UGeckoInstruction inst);
void subfic(UGeckoInstruction inst);
void subfcx(UGeckoInstruction inst);
void subfx(UGeckoInstruction inst);
void subfex(UGeckoInstruction inst);
void lXzx(UGeckoInstruction inst);
void lhax(UGeckoInstruction inst);
void stXx(UGeckoInstruction inst);
void lmw(UGeckoInstruction inst);
void stmw(UGeckoInstruction inst);
void icbi(UGeckoInstruction inst);
};
void Jit(u32 em_address);

10
Source/Core/Core/Src/PowerPC/JitArmIL/IR_Arm.cpp
View File

@ -519,6 +519,16 @@ static void DoWriteCode(IRBuilder* ibuild, JitArmIL* Jit) {
Jit->WriteExceptionExit();
break;
}
case ShortIdleLoop: {
unsigned InstLoc = ibuild->GetImmValue(getOp1(I));
Jit->MOVI2R(R14, (u32)&CoreTiming::Idle);
Jit->BL(R14);
Jit->MOVI2R(R14, InstLoc);
Jit->STR(R14, R9, PPCSTATE_OFF(pc));
Jit->MOVI2R(R14, (u32)Jit->GetAsmRoutines()->testExceptions);
Jit->B(R14);
break;
}
case InterpreterBranch: {
Jit->LDR(R14, R9, PPCSTATE_OFF(npc));
Jit->WriteExitDestInReg(R14);

18
Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.h
View File

@ -8,26 +8,21 @@
#include "../PPCAnalyst.h"
#include "ArmEmitter.h"
#include "../JitArm32/JitArmCache.h"
#include "../JitILCommon/JitILBase.h"
#include "../JitILCommon/IR.h"
#include "../JitCommon/JitBase.h"
#include "JitILAsm.h"
#define INSTRUCTION_START
#define JITDISABLE(setting) \
if (Core::g_CoreStartupParameter.bJITOff || \
Core::g_CoreStartupParameter.setting) \
{Default(inst); return;}
#define PPCSTATE_OFF(elem) ((s32)STRUCT_OFF(PowerPC::ppcState, elem) - (s32)STRUCT_OFF(PowerPC::ppcState, spr[0]))
class JitArmIL : public JitBase, public ArmGen::ARMXCodeBlock
class JitArmIL : public JitILBase, public ArmGen::ARMXCodeBlock
{
private:
JitArmBlockCache blocks;
// The default code buffer. We keep it around to not have to alloc/dealloc a
// large chunk of memory for each recompiled block.
PPCAnalyst::CodeBuffer code_buffer;
JitArmILAsmRoutineManager asm_routines;
void PrintDebug(UGeckoInstruction inst, u32 level);
@ -35,11 +30,9 @@ private:
public:
// Initialization, etc
JitArmIL() : code_buffer(32000) {}
JitArmIL() {}
~JitArmIL() {}
IREmitter::IRBuilder ibuild;
void Init();
void Shutdown();
@ -96,15 +89,10 @@ public:
void BIN_ADD(ARMReg reg, Operand2 op2);
// Branches
void icbi(UGeckoInstruction inst);
void sc(UGeckoInstruction inst);
void rfi(UGeckoInstruction inst);
void bx(UGeckoInstruction inst);
void bcx(UGeckoInstruction inst);
void bclrx(UGeckoInstruction inst);
void bcctrx(UGeckoInstruction inst);
// System Registers
void mtmsr(UGeckoInstruction inst);
};
#endif

16
Source/Core/Core/Src/PowerPC/JitArmIL/JitIL_Branch.cpp
View File

@ -14,24 +14,10 @@
#define NORMALBRANCH_START Default(inst); ibuild.EmitInterpreterBranch(); return;
//#define NORMALBRANCH_START
void JitArmIL::icbi(UGeckoInstruction inst)
{
Default(inst);
ibuild.EmitBranchUncond(ibuild.EmitIntConst(js.compilerPC + 4));
}
void JitArmIL::sc(UGeckoInstruction inst)
{
ibuild.EmitSystemCall(ibuild.EmitIntConst(js.compilerPC));
}
void JitArmIL::rfi(UGeckoInstruction inst)
{
ibuild.EmitRFIExit();
}
void JitArmIL::bx(UGeckoInstruction inst)
{
NORMALBRANCH_START
//NORMALBRANCH_START
INSTRUCTION_START;
// We must always process the following sentence

20
Source/Core/Core/Src/PowerPC/JitArmIL/JitIL_SystemRegisters.cpp
View File

@ -1,21 +1 @@
// Copyright 2013 Dolphin Emulator Project
// Licensed under GPLv2
// Refer to the license.txt file included.
#include "Common.h"
#include "../PowerPC.h"
#include "../PPCTables.h"
#include "JitIL.h"
#include "../../HW/Memmap.h"
// =======================================================================================
// Don't interpret this, if we do we get thrown out
// --------------
void JitArmIL::mtmsr(UGeckoInstruction inst)
{
ibuild.EmitStoreMSR(ibuild.EmitLoadGReg(inst.RS), ibuild.EmitIntConst(js.compilerPC));
ibuild.EmitBranchUncond(ibuild.EmitIntConst(js.compilerPC + 4));
}

146
Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase.h Normal file
View File

@ -0,0 +1,146 @@
// Copyright 2013 Dolphin Emulator Project
// Licensed under GPLv2
// Refer to the license.txt file included.
#ifndef _JITILBASE_H
#define _JITILBASE_H
#include "../PPCAnalyst.h"
#include "IR.h"
#include "../JitCommon/JitBase.h"
#define INSTRUCTION_START
#define JITDISABLE(setting) \
if (Core::g_CoreStartupParameter.bJITOff || \
Core::g_CoreStartupParameter.setting) \
{Default(inst); return;}
class JitILBase : public JitBase
{
protected:
// The default code buffer. We keep it around to not have to alloc/dealloc a
// large chunk of memory for each recompiled block.
PPCAnalyst::CodeBuffer code_buffer;
public:
JitILBase() : code_buffer(32000) {}
~JitILBase() {}
IREmitter::IRBuilder ibuild;
virtual JitBaseBlockCache *GetBlockCache() = 0;
virtual void Jit(u32 em_address) = 0;
virtual const u8 *BackPatch(u8 *codePtr, u32 em_address, void *ctx) = 0;
virtual const CommonAsmRoutinesBase *GetAsmRoutines() = 0;
virtual bool IsInCodeSpace(u8 *ptr) = 0;
// OPCODES
virtual void unknown_instruction(UGeckoInstruction inst) = 0;
virtual void Default(UGeckoInstruction inst) = 0;
virtual void DoNothing(UGeckoInstruction inst) = 0;
virtual void HLEFunction(UGeckoInstruction inst) = 0;
virtual void DynaRunTable4(UGeckoInstruction _inst) = 0;
virtual void DynaRunTable19(UGeckoInstruction _inst) = 0;
virtual void DynaRunTable31(UGeckoInstruction _inst) = 0;
virtual void DynaRunTable59(UGeckoInstruction _inst) = 0;
virtual void DynaRunTable63(UGeckoInstruction _inst) = 0;
// Branches
void sc(UGeckoInstruction inst);
void rfi(UGeckoInstruction inst);
void bx(UGeckoInstruction inst);
void bcx(UGeckoInstruction inst);
void bcctrx(UGeckoInstruction inst);
void bclrx(UGeckoInstruction inst);
// LoadStore
void lXzx(UGeckoInstruction inst);
void lhax(UGeckoInstruction inst);
void stXx(UGeckoInstruction inst);
void lmw(UGeckoInstruction inst);
void stmw(UGeckoInstruction inst);
void stX(UGeckoInstruction inst); //stw sth stb
void lXz(UGeckoInstruction inst);
void lbzu(UGeckoInstruction inst);
void lha(UGeckoInstruction inst);
// System Registers
void mtspr(UGeckoInstruction inst);
void mfspr(UGeckoInstruction inst);
void mtmsr(UGeckoInstruction inst);
void mfmsr(UGeckoInstruction inst);
void mftb(UGeckoInstruction inst);
void mtcrf(UGeckoInstruction inst);
void mfcr(UGeckoInstruction inst);
void mcrf(UGeckoInstruction inst);
void crXX(UGeckoInstruction inst);
void dcbst(UGeckoInstruction inst);
void dcbz(UGeckoInstruction inst);
void icbi(UGeckoInstruction inst);
void addx(UGeckoInstruction inst);
void boolX(UGeckoInstruction inst);
void mulli(UGeckoInstruction inst);
void mulhwux(UGeckoInstruction inst);
void mullwx(UGeckoInstruction inst);
void divwux(UGeckoInstruction inst);
void srawix(UGeckoInstruction inst);
void srawx(UGeckoInstruction inst);
void addex(UGeckoInstruction inst);
void addzex(UGeckoInstruction inst);
void extsbx(UGeckoInstruction inst);
void extshx(UGeckoInstruction inst);
void reg_imm(UGeckoInstruction inst);
void ps_sel(UGeckoInstruction inst);
void ps_mr(UGeckoInstruction inst);
void ps_sign(UGeckoInstruction inst); //aggregate
void ps_arith(UGeckoInstruction inst); //aggregate
void ps_mergeXX(UGeckoInstruction inst);
void ps_maddXX(UGeckoInstruction inst);
void ps_rsqrte(UGeckoInstruction inst);
void ps_sum(UGeckoInstruction inst);
void ps_muls(UGeckoInstruction inst);
void fp_arith_s(UGeckoInstruction inst);
void fcmpx(UGeckoInstruction inst);
void fmrx(UGeckoInstruction inst);
void cmpXX(UGeckoInstruction inst);
void cntlzwx(UGeckoInstruction inst);
void lfs(UGeckoInstruction inst);
void lfd(UGeckoInstruction inst);
void stfd(UGeckoInstruction inst);
void stfs(UGeckoInstruction inst);
void stfsx(UGeckoInstruction inst);
void psq_l(UGeckoInstruction inst);
void psq_st(UGeckoInstruction inst);
void fmaddXX(UGeckoInstruction inst);
void fsign(UGeckoInstruction inst);
void rlwinmx(UGeckoInstruction inst);
void rlwimix(UGeckoInstruction inst);
void rlwnmx(UGeckoInstruction inst);
void negx(UGeckoInstruction inst);
void slwx(UGeckoInstruction inst);
void srwx(UGeckoInstruction inst);
void lfsx(UGeckoInstruction inst);
void subfic(UGeckoInstruction inst);
void subfcx(UGeckoInstruction inst);
void subfx(UGeckoInstruction inst);
void subfex(UGeckoInstruction inst);
};
#endif

19
Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Branch.cpp → Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_Branch.cpp
View File

@ -8,10 +8,7 @@
#include "../PowerPC.h"
#include "../../CoreTiming.h"
#include "../PPCTables.h"
#include "x64Emitter.h"
#include "JitIL.h"
#include "JitILAsm.h"
#include "JitILBase.h"
#include "../../HW/Memmap.h"
@ -29,19 +26,17 @@
//#define NORMALBRANCH_START Default(inst); ibuild.EmitInterpreterBranch(); return;
#define NORMALBRANCH_START
using namespace Gen;
void JitIL::sc(UGeckoInstruction inst)
void JitILBase::sc(UGeckoInstruction inst)
{
ibuild.EmitSystemCall(ibuild.EmitIntConst(js.compilerPC));
}
void JitIL::rfi(UGeckoInstruction inst)
void JitILBase::rfi(UGeckoInstruction inst)
{
ibuild.EmitRFIExit();
}
void JitIL::bx(UGeckoInstruction inst)
void JitILBase::bx(UGeckoInstruction inst)
{
NORMALBRANCH_START
INSTRUCTION_START;
@ -109,7 +104,7 @@ static IREmitter::InstLoc TestBranch(IREmitter::IRBuilder& ibuild, UGeckoInstruc
return Test;
}
void JitIL::bcx(UGeckoInstruction inst)
void JitILBase::bcx(UGeckoInstruction inst)
{
NORMALBRANCH_START
if (inst.LK)
@ -140,7 +135,7 @@ void JitIL::bcx(UGeckoInstruction inst)
ibuild.EmitBranchUncond(ibuild.EmitIntConst(js.compilerPC + 4));
}
void JitIL::bcctrx(UGeckoInstruction inst)
void JitILBase::bcctrx(UGeckoInstruction inst)
{
NORMALBRANCH_START
if ((inst.BO & 4) == 0) {
@ -169,7 +164,7 @@ void JitIL::bcctrx(UGeckoInstruction inst)
ibuild.EmitBranchUncond(destination);
}
void JitIL::bclrx(UGeckoInstruction inst)
void JitILBase::bclrx(UGeckoInstruction inst)
{
NORMALBRANCH_START

16
Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_FloatingPoint.cpp → Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_FloatingPoint.cpp
View File

@ -7,14 +7,10 @@
#include "../../Core.h"
#include "../PowerPC.h"
#include "../PPCTables.h"
#include "x64Emitter.h"
#include "JitIL.h"
#include "JitILBase.h"
//#define INSTRUCTION_START Default(inst); return;
#define INSTRUCTION_START
void JitIL::fp_arith_s(UGeckoInstruction inst)
void JitILBase::fp_arith_s(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITFloatingPointOff)
@ -57,7 +53,7 @@ void JitIL::fp_arith_s(UGeckoInstruction inst)
ibuild.EmitStoreFReg(val, inst.FD);
}
void JitIL::fmaddXX(UGeckoInstruction inst)
void JitILBase::fmaddXX(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITFloatingPointOff)
@ -85,7 +81,7 @@ void JitIL::fmaddXX(UGeckoInstruction inst)
ibuild.EmitStoreFReg(val, inst.FD);
}
void JitIL::fmrx(UGeckoInstruction inst)
void JitILBase::fmrx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITFloatingPointOff)
@ -97,7 +93,7 @@ void JitIL::fmrx(UGeckoInstruction inst)
ibuild.EmitStoreFReg(val, inst.FD);
}
void JitIL::fcmpx(UGeckoInstruction inst)
void JitILBase::fcmpx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITFloatingPointOff)
@ -110,7 +106,7 @@ void JitIL::fcmpx(UGeckoInstruction inst)
ibuild.EmitStoreCR(res, inst.CRFD);
}
void JitIL::fsign(UGeckoInstruction inst)
void JitILBase::fsign(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITFloatingPointOff)

0
Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Integer.cpp → Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_Integer.cpp
View File

35
Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStore.cpp → Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_LoadStore.cpp
View File

@ -2,9 +2,6 @@
// Licensed under GPLv2
// Refer to the license.txt file included.
// TODO(ector): Tons of pshufb optimization of the loads/stores, for SSSE3+, possibly SSE4, only.
// Should give a very noticable speed boost to paired single heavy code.
#include "Common.h"
#include "../PowerPC.h"
@ -12,16 +9,10 @@
#include "../../HW/GPFifo.h"
#include "../../HW/Memmap.h"
#include "../PPCTables.h"
#include "x64Emitter.h"
#include "x64ABI.h"
#include "JitIL.h"
#include "JitILAsm.h"
#include "JitILBase.h"
//#define INSTRUCTION_START Default(inst); return;
#define INSTRUCTION_START
void JitIL::lhax(UGeckoInstruction inst)
void JitILBase::lhax(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreOff)
@ -34,7 +25,7 @@ void JitIL::lhax(UGeckoInstruction inst)
ibuild.EmitStoreGReg(val, inst.RD);
}
void JitIL::lXz(UGeckoInstruction inst)
void JitILBase::lXz(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreOff)
@ -55,7 +46,7 @@ void JitIL::lXz(UGeckoInstruction inst)
ibuild.EmitStoreGReg(val, inst.RD);
}
void JitIL::lbzu(UGeckoInstruction inst) {
void JitILBase::lbzu(UGeckoInstruction inst) {
INSTRUCTION_START
JITDISABLE(bJITLoadStoreOff)
const IREmitter::InstLoc uAddress = ibuild.EmitAdd(ibuild.EmitLoadGReg(inst.RA), ibuild.EmitIntConst((int)inst.SIMM_16));
@ -64,7 +55,7 @@ void JitIL::lbzu(UGeckoInstruction inst) {
ibuild.EmitStoreGReg(uAddress, inst.RA);
}
void JitIL::lha(UGeckoInstruction inst)
void JitILBase::lha(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreOff)
@ -78,7 +69,7 @@ void JitIL::lha(UGeckoInstruction inst)
ibuild.EmitStoreGReg(val, inst.RD);
}
void JitIL::lXzx(UGeckoInstruction inst)
void JitILBase::lXzx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreOff)
@ -100,7 +91,7 @@ void JitIL::lXzx(UGeckoInstruction inst)
ibuild.EmitStoreGReg(val, inst.RD);
}
void JitIL::dcbst(UGeckoInstruction inst)
void JitILBase::dcbst(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreOff)
@ -116,7 +107,7 @@ void JitIL::dcbst(UGeckoInstruction inst)
}
// Zero cache line.
void JitIL::dcbz(UGeckoInstruction inst)
void JitILBase::dcbz(UGeckoInstruction inst)
{
Default(inst); return;
@ -141,7 +132,7 @@ void JitIL::dcbz(UGeckoInstruction inst)
#endif
}
void JitIL::stX(UGeckoInstruction inst)
void JitILBase::stX(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreOff)
@ -161,7 +152,7 @@ void JitIL::stX(UGeckoInstruction inst)
}
}
void JitIL::stXx(UGeckoInstruction inst)
void JitILBase::stXx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreOff)
@ -181,7 +172,7 @@ void JitIL::stXx(UGeckoInstruction inst)
}
// A few games use these heavily in video codecs. (GFZP01 @ 0x80020E18)
void JitIL::lmw(UGeckoInstruction inst)
void JitILBase::lmw(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreOff)
@ -197,7 +188,7 @@ void JitIL::lmw(UGeckoInstruction inst)
}
}
void JitIL::stmw(UGeckoInstruction inst)
void JitILBase::stmw(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreOff)
@ -213,7 +204,7 @@ void JitIL::stmw(UGeckoInstruction inst)
}
}
void JitIL::icbi(UGeckoInstruction inst)
void JitILBase::icbi(UGeckoInstruction inst)
{
Default(inst);
ibuild.EmitBranchUncond(ibuild.EmitIntConst(js.compilerPC + 4));

24
Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStoreFloating.cpp → Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_LoadStoreFloating.cpp
View File

@ -2,9 +2,6 @@
// Licensed under GPLv2
// Refer to the license.txt file included.
// TODO(ector): Tons of pshufb optimization of the loads/stores, for SSSE3+, possibly SSE4, only.
// Should give a very noticable speed boost to paired single heavy code.
#include "Common.h"
#include "../PowerPC.h"
@ -12,21 +9,14 @@
#include "../../HW/GPFifo.h"
#include "../../HW/Memmap.h"
#include "../PPCTables.h"
#include "CPUDetect.h"
#include "x64Emitter.h"
#include "x64ABI.h"
#include "JitIL.h"
#include "JitILAsm.h"
//#define INSTRUCTION_START Default(inst); return;
#define INSTRUCTION_START
#include "JitILBase.h"
// TODO: Add peephole optimizations for multiple consecutive lfd/lfs/stfd/stfs since they are so common,
// and pshufb could help a lot.
// Also add hacks for things like lfs/stfs the same reg consecutively, that is, simple memory moves.
void JitIL::lfs(UGeckoInstruction inst)
void JitILBase::lfs(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreFloatingOff)
@ -40,7 +30,7 @@ void JitIL::lfs(UGeckoInstruction inst)
}
void JitIL::lfd(UGeckoInstruction inst)
void JitILBase::lfd(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreFloatingOff)
@ -55,7 +45,7 @@ void JitIL::lfd(UGeckoInstruction inst)
}
void JitIL::stfd(UGeckoInstruction inst)
void JitILBase::stfd(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreFloatingOff)
@ -71,7 +61,7 @@ void JitIL::stfd(UGeckoInstruction inst)
}
void JitIL::stfs(UGeckoInstruction inst)
void JitILBase::stfs(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreFloatingOff)
@ -88,7 +78,7 @@ void JitIL::stfs(UGeckoInstruction inst)
}
void JitIL::stfsx(UGeckoInstruction inst)
void JitILBase::stfsx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreFloatingOff)
@ -103,7 +93,7 @@ void JitIL::stfsx(UGeckoInstruction inst)
}
void JitIL::lfsx(UGeckoInstruction inst)
void JitILBase::lfsx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStoreFloatingOff)

13
Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStorePaired.cpp → Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_LoadStorePaired.cpp
View File

@ -9,17 +9,10 @@
#include "../../HW/GPFifo.h"
#include "../../HW/Memmap.h"
#include "../PPCTables.h"
#include "CPUDetect.h"
#include "x64Emitter.h"
#include "x64ABI.h"
#include "JitIL.h"
#include "JitILAsm.h"
#include "JitILBase.h"
//#define INSTRUCTION_START Default(inst); return;
#define INSTRUCTION_START
void JitIL::psq_st(UGeckoInstruction inst)
void JitILBase::psq_st(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStorePairedOff)
@ -35,7 +28,7 @@ void JitIL::psq_st(UGeckoInstruction inst)
ibuild.EmitStorePaired(val, addr, inst.I);
}
void JitIL::psq_l(UGeckoInstruction inst)
void JitILBase::psq_l(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITLoadStorePairedOff)

21
Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Paired.cpp → Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_Paired.cpp
View File

@ -7,32 +7,31 @@
#include "../../Core.h"
#include "../PowerPC.h"
#include "../PPCTables.h"
#include "x64Emitter.h"
#include "../../HW/GPFifo.h"
#include "JitIL.h"
#include "JitILBase.h"
void JitIL::ps_mr(UGeckoInstruction inst)
void JitILBase::ps_mr(UGeckoInstruction inst)
{
Default(inst); return;
}
void JitIL::ps_sel(UGeckoInstruction inst)
void JitILBase::ps_sel(UGeckoInstruction inst)
{
Default(inst); return;
}
void JitIL::ps_sign(UGeckoInstruction inst)
void JitILBase::ps_sign(UGeckoInstruction inst)
{
Default(inst); return;
}
void JitIL::ps_rsqrte(UGeckoInstruction inst)
void JitILBase::ps_rsqrte(UGeckoInstruction inst)
{
Default(inst); return;
}
void JitIL::ps_arith(UGeckoInstruction inst)
void JitILBase::ps_arith(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITPairedOff)
@ -61,7 +60,7 @@ void JitIL::ps_arith(UGeckoInstruction inst)
ibuild.EmitStoreFReg(val, inst.FD);
}
void JitIL::ps_sum(UGeckoInstruction inst)
void JitILBase::ps_sum(UGeckoInstruction inst)
{
// TODO: This operation strikes me as a bit strange...
// perhaps we can optimize it depending on the users?
@ -84,7 +83,7 @@ void JitIL::ps_sum(UGeckoInstruction inst)
}
void JitIL::ps_muls(UGeckoInstruction inst)
void JitILBase::ps_muls(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITPairedOff)
@ -109,7 +108,7 @@ void JitIL::ps_muls(UGeckoInstruction inst)
//TODO: find easy cases and optimize them, do a breakout like ps_arith
void JitIL::ps_mergeXX(UGeckoInstruction inst)
void JitILBase::ps_mergeXX(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITPairedOff)
@ -142,7 +141,7 @@ void JitIL::ps_mergeXX(UGeckoInstruction inst)
}
void JitIL::ps_maddXX(UGeckoInstruction inst)
void JitILBase::ps_maddXX(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITPairedOff)

25
Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp → Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_SystemRegisters.cpp
View File

@ -9,15 +9,10 @@
#include "../../HW/SystemTimers.h"
#include "../PowerPC.h"
#include "../PPCTables.h"
#include "x64Emitter.h"
#include "x64ABI.h"
#include "JitIL.h"
#include "JitILBase.h"
//#define INSTRUCTION_START Default(inst); return;
#define INSTRUCTION_START
void JitIL::mtspr(UGeckoInstruction inst)
void JitILBase::mtspr(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITSystemRegistersOff)
@ -53,7 +48,7 @@ void JitIL::mtspr(UGeckoInstruction inst)
}
}
void JitIL::mfspr(UGeckoInstruction inst)
void JitILBase::mfspr(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITSystemRegistersOff)
@ -90,7 +85,7 @@ void JitIL::mfspr(UGeckoInstruction inst)
// =======================================================================================
// Don't interpret this, if we do we get thrown out
// --------------
void JitIL::mtmsr(UGeckoInstruction inst)
void JitILBase::mtmsr(UGeckoInstruction inst)
{
ibuild.EmitStoreMSR(ibuild.EmitLoadGReg(inst.RS), ibuild.EmitIntConst(js.compilerPC));
ibuild.EmitBranchUncond(ibuild.EmitIntConst(js.compilerPC + 4));
@ -98,21 +93,21 @@ void JitIL::mtmsr(UGeckoInstruction inst)
// ==============
void JitIL::mfmsr(UGeckoInstruction inst)
void JitILBase::mfmsr(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITSystemRegistersOff)
ibuild.EmitStoreGReg(ibuild.EmitLoadMSR(), inst.RD);
}
void JitIL::mftb(UGeckoInstruction inst)
void JitILBase::mftb(UGeckoInstruction inst)
{
INSTRUCTION_START;
JITDISABLE(bJITSystemRegistersOff)
mfspr(inst);
}
void JitIL::mfcr(UGeckoInstruction inst)
void JitILBase::mfcr(UGeckoInstruction inst)
{
INSTRUCTION_START;
JITDISABLE(bJITSystemRegistersOff)
@ -126,7 +121,7 @@ void JitIL::mfcr(UGeckoInstruction inst)
ibuild.EmitStoreGReg(d, inst.RD);
}
void JitIL::mtcrf(UGeckoInstruction inst)
void JitILBase::mtcrf(UGeckoInstruction inst)
{
INSTRUCTION_START;
JITDISABLE(bJITSystemRegistersOff)
@ -144,7 +139,7 @@ void JitIL::mtcrf(UGeckoInstruction inst)
}
}
void JitIL::mcrf(UGeckoInstruction inst)
void JitILBase::mcrf(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITSystemRegistersOff)
@ -155,7 +150,7 @@ void JitIL::mcrf(UGeckoInstruction inst)
}
}
void JitIL::crXX(UGeckoInstruction inst)
void JitILBase::crXX(UGeckoInstruction inst)
{
// Ported from Jit_SystemRegister.cpp