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HW: Move MemoryInterface variables to Core::System.

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This commit is contained in:
Admiral H. Curtiss 2022-10-13 04:22:36 +02:00
parent 06f74bd7d1
commit e47af664cc
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GPG Key ID: F051B4C4044F33FB
4 changed files with 65 additions and 21 deletions
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55
Source/Core/Core/HW/MemoryInterface.cpp
View File

@ -11,6 +11,7 @@
#include "Common/ChunkFile.h"
#include "Common/CommonTypes.h"
#include "Core/HW/MMIO.h"
#include "Core/System.h"
namespace MemoryInterface
{
@ -134,13 +135,22 @@ struct MIMemStruct
u16 unknown2 = 0;
};
// STATE_TO_SAVE
static MIMemStruct g_mi_mem;
struct MemoryInterfaceState::Data
{
MIMemStruct mi_mem;
};
MemoryInterfaceState::MemoryInterfaceState() : m_data(std::make_unique<Data>())
{
}
MemoryInterfaceState::~MemoryInterfaceState() = default;
void Init()
{
auto& state = Core::System::GetInstance().GetMemoryInterfaceState().GetData();
static_assert(std::is_trivially_copyable_v<MIMemStruct>);
std::memset(&g_mi_mem, 0, sizeof(MIMemStruct));
std::memset(&state.mi_mem, 0, sizeof(MIMemStruct));
}
void Shutdown()
@ -150,51 +160,54 @@ void Shutdown()
void DoState(PointerWrap& p)
{
p.Do(g_mi_mem);
auto& state = Core::System::GetInstance().GetMemoryInterfaceState().GetData();
p.Do(state.mi_mem);
}
void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
{
auto& state = Core::System::GetInstance().GetMemoryInterfaceState().GetData();
for (u32 i = MI_REGION0_FIRST; i <= MI_REGION3_LAST; i += 4)
{
auto& region = g_mi_mem.regions[i / 4];
auto& region = state.mi_mem.regions[i / 4];
mmio->Register(base | i, MMIO::DirectRead<u16>(&region.first_page),
MMIO::DirectWrite<u16>(&region.first_page));
mmio->Register(base | (i + 2), MMIO::DirectRead<u16>(&region.last_page),
MMIO::DirectWrite<u16>(&region.last_page));
}
mmio->Register(base | MI_PROT_TYPE, MMIO::DirectRead<u16>(&g_mi_mem.prot_type.hex),
MMIO::DirectWrite<u16>(&g_mi_mem.prot_type.hex));
mmio->Register(base | MI_PROT_TYPE, MMIO::DirectRead<u16>(&state.mi_mem.prot_type.hex),
MMIO::DirectWrite<u16>(&state.mi_mem.prot_type.hex));
mmio->Register(base | MI_IRQMASK, MMIO::DirectRead<u16>(&g_mi_mem.irq_mask.hex),
MMIO::DirectWrite<u16>(&g_mi_mem.irq_mask.hex));
mmio->Register(base | MI_IRQMASK, MMIO::DirectRead<u16>(&state.mi_mem.irq_mask.hex),
MMIO::DirectWrite<u16>(&state.mi_mem.irq_mask.hex));
mmio->Register(base | MI_IRQFLAG, MMIO::DirectRead<u16>(&g_mi_mem.irq_flag.hex),
MMIO::DirectWrite<u16>(&g_mi_mem.irq_flag.hex));
mmio->Register(base | MI_IRQFLAG, MMIO::DirectRead<u16>(&state.mi_mem.irq_flag.hex),
MMIO::DirectWrite<u16>(&state.mi_mem.irq_flag.hex));
mmio->Register(base | MI_UNKNOWN1, MMIO::DirectRead<u16>(&g_mi_mem.unknown1),
MMIO::DirectWrite<u16>(&g_mi_mem.unknown1));
mmio->Register(base | MI_UNKNOWN1, MMIO::DirectRead<u16>(&state.mi_mem.unknown1),
MMIO::DirectWrite<u16>(&state.mi_mem.unknown1));
// The naming is confusing here: the register contains the lower part of
// the address (hence MI_..._LO but this is still the high part of the
// overall register.
mmio->Register(base | MI_PROT_ADDR_LO, MMIO::DirectRead<u16>(&g_mi_mem.prot_addr.hi),
MMIO::DirectWrite<u16>(&g_mi_mem.prot_addr.hi));
mmio->Register(base | MI_PROT_ADDR_HI, MMIO::DirectRead<u16>(&g_mi_mem.prot_addr.lo),
MMIO::DirectWrite<u16>(&g_mi_mem.prot_addr.lo));
mmio->Register(base | MI_PROT_ADDR_LO, MMIO::DirectRead<u16>(&state.mi_mem.prot_addr.hi),
MMIO::DirectWrite<u16>(&state.mi_mem.prot_addr.hi));
mmio->Register(base | MI_PROT_ADDR_HI, MMIO::DirectRead<u16>(&state.mi_mem.prot_addr.lo),
MMIO::DirectWrite<u16>(&state.mi_mem.prot_addr.lo));
for (u32 i = 0; i < g_mi_mem.timers.size(); ++i)
for (u32 i = 0; i < state.mi_mem.timers.size(); ++i)
{
auto& timer = g_mi_mem.timers[i];
auto& timer = state.mi_mem.timers[i];
mmio->Register(base | (MI_TIMER0_HI + 4 * i), MMIO::DirectRead<u16>(&timer.hi),
MMIO::DirectWrite<u16>(&timer.hi));
mmio->Register(base | (MI_TIMER0_LO + 4 * i), MMIO::DirectRead<u16>(&timer.lo),
MMIO::DirectWrite<u16>(&timer.lo));
}
mmio->Register(base | MI_UNKNOWN2, MMIO::DirectRead<u16>(&g_mi_mem.unknown2),
MMIO::DirectWrite<u16>(&g_mi_mem.unknown2));
mmio->Register(base | MI_UNKNOWN2, MMIO::DirectRead<u16>(&state.mi_mem.unknown2),
MMIO::DirectWrite<u16>(&state.mi_mem.unknown2));
for (u32 i = 0; i < 0x1000; i += 4)
{

19
Source/Core/Core/HW/MemoryInterface.h
View File

@ -3,6 +3,8 @@
#pragma once
#include <memory>
#include "Common/CommonTypes.h"
namespace MMIO
@ -13,6 +15,23 @@ class PointerWrap;
namespace MemoryInterface
{
class MemoryInterfaceState
{
public:
MemoryInterfaceState();
MemoryInterfaceState(const MemoryInterfaceState&) = delete;
MemoryInterfaceState(MemoryInterfaceState&&) = delete;
MemoryInterfaceState& operator=(const MemoryInterfaceState&) = delete;
MemoryInterfaceState& operator=(MemoryInterfaceState&&) = delete;
~MemoryInterfaceState();
struct Data;
Data& GetData() { return *m_data; }
private:
std::unique_ptr<Data> m_data;
};
void Init();
void Shutdown();

7
Source/Core/Core/System.cpp
View File

@ -12,6 +12,7 @@
#include "Core/HW/DVD/DVDInterface.h"
#include "Core/HW/DVD/DVDThread.h"
#include "Core/HW/EXI/EXI.h"
#include "Core/HW/MemoryInterface.h"
#include "Core/HW/SI/SI.h"
#include "Core/HW/Sram.h"
#include "Core/HW/VideoInterface.h"
@ -29,6 +30,7 @@ struct System::Impl
DVDInterface::DVDInterfaceState m_dvd_interface_state;
DVDThread::DVDThreadState m_dvd_thread_state;
ExpansionInterface::ExpansionInterfaceState m_expansion_interface_state;
MemoryInterface::MemoryInterfaceState m_memory_interface_state;
SerialInterface::SerialInterfaceState m_serial_interface_state;
Sram m_sram;
VideoInterface::VideoInterfaceState m_video_interface_state;
@ -102,6 +104,11 @@ ExpansionInterface::ExpansionInterfaceState& System::GetExpansionInterfaceState(
return m_impl->m_expansion_interface_state;
}
MemoryInterface::MemoryInterfaceState& System::GetMemoryInterfaceState() const
{
return m_impl->m_memory_interface_state;
}
SerialInterface::SerialInterfaceState& System::GetSerialInterfaceState() const
{
return m_impl->m_serial_interface_state;

5
Source/Core/Core/System.h
View File

@ -28,6 +28,10 @@ namespace ExpansionInterface
{
class ExpansionInterfaceState;
};
namespace MemoryInterface
{
class MemoryInterfaceState;
};
namespace SerialInterface
{
class SerialInterfaceState;
@ -76,6 +80,7 @@ public:
DVDInterface::DVDInterfaceState& GetDVDInterfaceState() const;
DVDThread::DVDThreadState& GetDVDThreadState() const;
ExpansionInterface::ExpansionInterfaceState& GetExpansionInterfaceState() const;
MemoryInterface::MemoryInterfaceState& GetMemoryInterfaceState() const;
SerialInterface::SerialInterfaceState& GetSerialInterfaceState() const;
Sram& GetSRAM() const;
VideoInterface::VideoInterfaceState& GetVideoInterfaceState() const;