mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2024-11-14 21:37:52 -07:00
JITIL 64 - fix stupid bug in IR.cpp. Almost there... loadstorepaired left. fix disasm in 32-bit mode.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3414 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
parent
087fe68d6d
commit
e8767497b5
@ -362,9 +362,9 @@ void Write16(const u16 _Value, const u32 _Address)
|
||||
g_dspState.DSPControl.DSP_mask = tmpControl.DSP_mask;
|
||||
|
||||
// Interrupt
|
||||
if (tmpControl.AID) g_dspState.DSPControl.AID = 0;
|
||||
if (tmpControl.ARAM) g_dspState.DSPControl.ARAM = 0;
|
||||
if (tmpControl.DSP) g_dspState.DSPControl.DSP = 0;
|
||||
if (tmpControl.AID) g_dspState.DSPControl.AID = 0;
|
||||
if (tmpControl.ARAM) g_dspState.DSPControl.ARAM = 0;
|
||||
if (tmpControl.DSP) g_dspState.DSPControl.DSP = 0;
|
||||
|
||||
// g_ARAM
|
||||
g_dspState.DSPControl.ARAM_DMAState = 0; // keep g_ARAM DMA State zero
|
||||
@ -374,7 +374,7 @@ void Write16(const u16 _Value, const u32 _Address)
|
||||
g_dspState.DSPControl.pad = tmpControl.pad;
|
||||
if (g_dspState.DSPControl.pad != 0)
|
||||
{
|
||||
PanicAlert("DSPInterface(w) g_dspState.DSPControl gets a value with junk in the padding %08x", _Value);
|
||||
PanicAlert("DSPInterface (w) g_dspState.DSPControl (CC00500A) gets a value with junk in the padding %08x", _Value);
|
||||
}
|
||||
|
||||
UpdateInterrupts();
|
||||
|
@ -1136,12 +1136,12 @@ static void regEmitMemLoad(RegInfo& RI, InstLoc I, unsigned Size) {
|
||||
case 16: RI.Jit->ABI_CallFunctionR(thunks.ProtectFunction((void *)&Memory::Read_U16, 1), ECX); break;
|
||||
case 8: RI.Jit->ABI_CallFunctionR(thunks.ProtectFunction((void *)&Memory::Read_U8, 1), ECX); break;
|
||||
}
|
||||
#ifdef _M_IX86
|
||||
if (reg != EAX) {
|
||||
RI.Jit->MOV(32, R(reg), R(EAX));
|
||||
#ifdef _M_IX86
|
||||
RI.Jit->POP(32, R(EAX));
|
||||
}
|
||||
#endif
|
||||
}
|
||||
FixupBranch arg2 = RI.Jit->J();
|
||||
RI.Jit->SetJumpTarget(argh);
|
||||
RI.Jit->UnsafeLoadRegToReg(ECX, reg, Size, 0, false);
|
||||
|
@ -286,7 +286,8 @@ static std::map<u32, int> been_here;
|
||||
void ImHere()
|
||||
{
|
||||
static FILE *f = 0;
|
||||
if (ImHereLog) {
|
||||
if (ImHereLog)
|
||||
{
|
||||
if (!f)
|
||||
{
|
||||
#ifdef _M_X64
|
||||
@ -295,7 +296,7 @@ void ImHere()
|
||||
f = fopen("log32.txt", "w");
|
||||
#endif
|
||||
}
|
||||
fprintf(f, "%08x\n", PC);
|
||||
fprintf(f, "%08x r0: %08x r5: %08x r6: %08x\n", PC, PowerPC::ppcState.gpr[0], PowerPC::ppcState.gpr[5], PowerPC::ppcState.gpr[6]); fflush(f);
|
||||
}
|
||||
if (been_here.find(PC) != been_here.end()) {
|
||||
been_here.find(PC)->second++;
|
||||
@ -430,9 +431,12 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buffer, JitB
|
||||
const u8 *normalEntry = GetCodePtr();
|
||||
b->normalEntry = normalEntry;
|
||||
|
||||
//MOV(32, M(&PowerPC::ppcState.pc), Imm32(em_address));
|
||||
if (ImHereDebug)
|
||||
ABI_CallFunction((void *)&ImHere); //Used to get a trace of the last few blocks before a crash, sometimes VERY useful
|
||||
|
||||
//if (em_address == 0x80137868)
|
||||
// INT3();
|
||||
|
||||
if (js.fpa.any)
|
||||
{
|
||||
//This block uses FPU - needs to add FP exception bailout
|
||||
|
@ -41,7 +41,6 @@
|
||||
void Jit64::lhax(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START
|
||||
DISABLE64
|
||||
JITDISABLE(LoadStore)
|
||||
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB);
|
||||
if (inst.RA)
|
||||
@ -54,7 +53,6 @@ void Jit64::lhax(UGeckoInstruction inst)
|
||||
void Jit64::lXz(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START
|
||||
DISABLE64
|
||||
JITDISABLE(LoadStore)
|
||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16);
|
||||
if (inst.RA)
|
||||
@ -62,7 +60,7 @@ void Jit64::lXz(UGeckoInstruction inst)
|
||||
if (inst.OPCD & 1)
|
||||
ibuild.EmitStoreGReg(addr, inst.RA);
|
||||
IREmitter::InstLoc val;
|
||||
switch (inst.OPCD & -2)
|
||||
switch (inst.OPCD & ~0x1)
|
||||
{
|
||||
case 32: val = ibuild.EmitLoad32(addr); break; //lwz
|
||||
case 40: val = ibuild.EmitLoad16(addr); break; //lhz
|
||||
@ -75,7 +73,6 @@ void Jit64::lXz(UGeckoInstruction inst)
|
||||
void Jit64::lha(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START
|
||||
DISABLE64
|
||||
JITDISABLE(LoadStore)
|
||||
IREmitter::InstLoc addr =
|
||||
ibuild.EmitIntConst((s32)(s16)inst.SIMM_16);
|
||||
@ -89,7 +86,6 @@ void Jit64::lha(UGeckoInstruction inst)
|
||||
void Jit64::lXzx(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START
|
||||
DISABLE64
|
||||
JITDISABLE(LoadStore)
|
||||
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB);
|
||||
if (inst.RA) {
|
||||
@ -137,7 +133,6 @@ void Jit64::dcbz(UGeckoInstruction inst)
|
||||
void Jit64::stX(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START
|
||||
DISABLE64
|
||||
JITDISABLE(LoadStore)
|
||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16),
|
||||
value = ibuild.EmitLoadGReg(inst.RS);
|
||||
@ -157,7 +152,6 @@ void Jit64::stX(UGeckoInstruction inst)
|
||||
void Jit64::stXx(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START
|
||||
DISABLE64
|
||||
JITDISABLE(LoadStore)
|
||||
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB),
|
||||
value = ibuild.EmitLoadGReg(inst.RS);
|
||||
@ -177,7 +171,6 @@ void Jit64::stXx(UGeckoInstruction inst)
|
||||
void Jit64::lmw(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START
|
||||
DISABLE64
|
||||
JITDISABLE(LoadStore)
|
||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16);
|
||||
if (inst.RA)
|
||||
@ -193,7 +186,6 @@ void Jit64::lmw(UGeckoInstruction inst)
|
||||
void Jit64::stmw(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START
|
||||
DISABLE64
|
||||
JITDISABLE(LoadStore)
|
||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16);
|
||||
if (inst.RA)
|
||||
|
@ -45,7 +45,6 @@
|
||||
void Jit64::lfs(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START
|
||||
DISABLE64
|
||||
JITDISABLE(LoadStoreFloating)
|
||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val;
|
||||
if (inst.RA)
|
||||
@ -59,7 +58,6 @@ void Jit64::lfs(UGeckoInstruction inst)
|
||||
void Jit64::lfd(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START
|
||||
DISABLE64
|
||||
JITDISABLE(LoadStoreFloating)
|
||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val;
|
||||
if (inst.RA)
|
||||
@ -74,7 +72,6 @@ void Jit64::lfd(UGeckoInstruction inst)
|
||||
void Jit64::stfd(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START
|
||||
DISABLE64
|
||||
JITDISABLE(LoadStoreFloating)
|
||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16),
|
||||
val = ibuild.EmitLoadFReg(inst.RS);
|
||||
@ -90,7 +87,6 @@ void Jit64::stfd(UGeckoInstruction inst)
|
||||
void Jit64::stfs(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START
|
||||
DISABLE64
|
||||
JITDISABLE(LoadStoreFloating)
|
||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16),
|
||||
val = ibuild.EmitLoadFReg(inst.RS);
|
||||
@ -107,7 +103,6 @@ void Jit64::stfs(UGeckoInstruction inst)
|
||||
void Jit64::stfsx(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START
|
||||
DISABLE64
|
||||
JITDISABLE(LoadStoreFloating)
|
||||
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB),
|
||||
val = ibuild.EmitLoadFReg(inst.RS);
|
||||
@ -122,7 +117,6 @@ void Jit64::stfsx(UGeckoInstruction inst)
|
||||
void Jit64::lfsx(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START
|
||||
DISABLE64
|
||||
JITDISABLE(LoadStoreFloating)
|
||||
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB), val;
|
||||
if (inst.RA)
|
||||
|
@ -183,7 +183,11 @@ void CJitWindow::Compare(u32 em_address)
|
||||
int num_x86_instructions = 0;
|
||||
while ((u8*)disasmPtr < end)
|
||||
{
|
||||
#ifdef _M_X64
|
||||
disasmPtr += x64disasm.disasm64(disasmPtr, disasmPtr, (u8*)disasmPtr, sptr);
|
||||
#else
|
||||
disasmPtr += x64disasm.disasm32(disasmPtr, disasmPtr, (u8*)disasmPtr, sptr);
|
||||
#endif
|
||||
sptr += strlen(sptr);
|
||||
*sptr++ = 13;
|
||||
*sptr++ = 10;
|
||||
|
Loading…
Reference in New Issue
Block a user