mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2024-11-14 13:27:45 -07:00
BPMemory: Use even/odd in TwoTevStageOrders instead of 0/1
This commit is contained in:
parent
e43f02c752
commit
f21798b9b6
@ -777,21 +777,24 @@ struct fmt::formatter<RasColorChan> : EnumFormatter<RasColorChan::Zero>
|
||||
|
||||
union TwoTevStageOrders
|
||||
{
|
||||
BitField<0, 3, u32> texmap0; // Indirect tex stage texmap
|
||||
BitField<3, 3, u32> texcoord0;
|
||||
BitField<6, 1, bool, u32> enable0; // true if should read from texture
|
||||
BitField<7, 3, RasColorChan> colorchan0;
|
||||
BitField<0, 3, u32> texmap_even;
|
||||
BitField<3, 3, u32> texcoord_even;
|
||||
BitField<6, 1, bool, u32> enable_tex_even; // true if should read from texture
|
||||
BitField<7, 3, RasColorChan> colorchan_even;
|
||||
|
||||
BitField<12, 3, u32> texmap1;
|
||||
BitField<15, 3, u32> texcoord1;
|
||||
BitField<18, 1, bool, u32> enable1; // true if should read from texture
|
||||
BitField<19, 3, RasColorChan> colorchan1;
|
||||
BitField<12, 3, u32> texmap_odd;
|
||||
BitField<15, 3, u32> texcoord_odd;
|
||||
BitField<18, 1, bool, u32> enable_tex_odd; // true if should read from texture
|
||||
BitField<19, 3, RasColorChan> colorchan_odd;
|
||||
|
||||
u32 hex;
|
||||
u32 getTexMap(int i) const { return i ? texmap1.Value() : texmap0.Value(); }
|
||||
u32 getTexCoord(int i) const { return i ? texcoord1.Value() : texcoord0.Value(); }
|
||||
u32 getEnable(int i) const { return i ? enable1.Value() : enable0.Value(); }
|
||||
RasColorChan getColorChan(int i) const { return i ? colorchan1.Value() : colorchan0.Value(); }
|
||||
u32 getTexMap(int i) const { return i ? texmap_odd.Value() : texmap_even.Value(); }
|
||||
u32 getTexCoord(int i) const { return i ? texcoord_odd.Value() : texcoord_even.Value(); }
|
||||
u32 getEnable(int i) const { return i ? enable_tex_odd.Value() : enable_tex_even.Value(); }
|
||||
RasColorChan getColorChan(int i) const
|
||||
{
|
||||
return i ? colorchan_odd.Value() : colorchan_even.Value();
|
||||
}
|
||||
};
|
||||
template <>
|
||||
struct fmt::formatter<TwoTevStageOrders>
|
||||
@ -805,9 +808,10 @@ struct fmt::formatter<TwoTevStageOrders>
|
||||
"Stage 0 enable texmap: {}\nStage 0 color channel: {}\n"
|
||||
"Stage 1 texmap: {}\nStage 1 tex coord: {}\n"
|
||||
"Stage 1 enable texmap: {}\nStage 1 color channel: {}\n",
|
||||
stages.texmap0, stages.texcoord0, stages.enable0 ? "Yes" : "No",
|
||||
stages.colorchan0, stages.texmap1, stages.texcoord1,
|
||||
stages.enable1 ? "Yes" : "No", stages.colorchan1);
|
||||
stages.texmap_even, stages.texcoord_even,
|
||||
stages.enable_tex_even ? "Yes" : "No", stages.colorchan_even,
|
||||
stages.texmap_odd, stages.texcoord_odd,
|
||||
stages.enable_tex_odd ? "Yes" : "No", stages.colorchan_odd);
|
||||
}
|
||||
};
|
||||
|
||||
|
@ -581,7 +581,8 @@ ShaderCode GenPixelShader(APIType api_type, const ShaderHostConfig& host_config,
|
||||
" ss.order = bpmem_tevorder(stage>>1);\n"
|
||||
" if ((stage & 1u) == 1u)\n"
|
||||
" ss.order = ss.order >> {};\n\n",
|
||||
int(TwoTevStageOrders().enable1.StartBit() - TwoTevStageOrders().enable0.StartBit()));
|
||||
int(TwoTevStageOrders().enable_tex_odd.StartBit() -
|
||||
TwoTevStageOrders().enable_tex_even.StartBit()));
|
||||
|
||||
// Disable texturing when there are no texgens (for now)
|
||||
if (numTexgen != 0)
|
||||
@ -596,11 +597,11 @@ ShaderCode GenPixelShader(APIType api_type, const ShaderHostConfig& host_config,
|
||||
|
||||
out.Write("\n"
|
||||
" uint tex_coord = {};\n",
|
||||
BitfieldExtract<&TwoTevStageOrders::texcoord0>("ss.order"));
|
||||
BitfieldExtract<&TwoTevStageOrders::texcoord_even>("ss.order"));
|
||||
out.Write(" int2 fixedPoint_uv = getTexCoord(tex_coord);\n"
|
||||
"\n"
|
||||
" bool texture_enabled = (ss.order & {}u) != 0u;\n",
|
||||
1 << TwoTevStageOrders().enable0.StartBit());
|
||||
1 << TwoTevStageOrders().enable_tex_even.StartBit());
|
||||
out.Write("\n"
|
||||
" // Indirect textures\n"
|
||||
" uint tevind = bpmem_tevind(stage);\n"
|
||||
@ -712,7 +713,7 @@ ShaderCode GenPixelShader(APIType api_type, const ShaderHostConfig& host_config,
|
||||
" // Sample texture for stage\n"
|
||||
" if (texture_enabled) {{\n"
|
||||
" uint sampler_num = {};\n",
|
||||
BitfieldExtract<&TwoTevStageOrders::texmap0>("ss.order"));
|
||||
BitfieldExtract<&TwoTevStageOrders::texmap_even>("ss.order"));
|
||||
out.Write("\n"
|
||||
" int4 color = sampleTextureWrapper(sampler_num, tevcoord.xy, layer);\n"
|
||||
" uint swap = {};\n",
|
||||
@ -1216,7 +1217,7 @@ ShaderCode GenPixelShader(APIType api_type, const ShaderHostConfig& host_config,
|
||||
"int4 getRasColor(State s, StageState ss, float4 colors_0, float4 colors_1) {{\n"
|
||||
" // Select Ras for stage\n"
|
||||
" uint ras = {};\n",
|
||||
BitfieldExtract<&TwoTevStageOrders::colorchan0>("ss.order"));
|
||||
BitfieldExtract<&TwoTevStageOrders::colorchan_even>("ss.order"));
|
||||
out.Write(" if (ras < 2u) {{ // Lighting Channel 0 or 1\n"
|
||||
" int4 color = iround(((ras == 0u) ? colors_0 : colors_1) * 255.0);\n"
|
||||
" uint swap = {};\n",
|
||||
|
Loading…
Reference in New Issue
Block a user