Commit Graph

172 Commits

Author SHA1 Message Date
dfbf39c768 Mention enable MMU in the DSI Exception message (Invalid read from ###/Invalid write to ###)
This has been possible for a long time now (see https://dolphin-emu.org/blog/2016/09/06/booting-the-final-gc-game/#side-effects-of-a-hardcode-rewrite), but it seems like people still aren't aware of it.
2025-08-13 11:55:40 -07:00
6591fa3751 Core/PowerPC: Split 'IsRAMAddress' method into 'IsEffectiveRAMAddress' and 'IsPhysicalRAMAddress' methods 2025-06-14 23:29:03 +02:00
e351f03cdf VideoCommon: Fix out-of-bounds and disabled EFB access. 2025-03-26 01:23:16 -05:00
6c158ed590 VideoCommon: Create AsyncRequests directly in MMU code to eliminate EFB-related functions in VideoBackendBase. 2025-03-14 01:14:51 -05:00
63b848ca93 VideoCommon: Eliminate EFBAccessType enum. Eliminate union and switch statement handler in AsyncRequests. 2025-03-14 00:59:41 -05:00
a85d89af39 Merge pull request #12626 from MikeIsAStar/remove-erroneous-continue-statement
MMU: Remove erroneous continue statement
2024-06-06 03:54:59 +02:00
fbbfea8e8e Replace Common::BitCast with std::bit_cast 2024-05-03 18:43:51 -07:00
cf74c0d683 PPCCache: Avoid Global System Accessor 2024-04-08 19:49:57 -07:00
ad43b03253 HW: Remove calls to GetPointer
Typically when someone uses GetPointer, it's because they want to read
from a range of memory. GetPointer is unsafe to use for this. While it
does check that the passed-in address is valid, it doesn't know the size
of the range that will be accessed, so it can't check that the end
address is valid. The safer alternative GetPointerForRange should be
used instead.

Note that there is still the problem of many callers not checking for
nullptr.

This is part 2 of a series of changes removing the use of GetPointer
throughout the code base. After this, VideoCommon is the one major part
of Dolphin that remains.
2024-03-31 21:58:05 +02:00
c24fa93965 PPCSymbolDB: Move instance to PowerPCManager 2024-03-13 22:58:14 -07:00
11dd5ba485 MMU: Remove erroneous continue statement
The updated behavior more closely emulates the functionality of physical hardware.
2024-03-08 16:36:38 -05:00
9a3e770c23 Migrate SConfig::bWii to System. 2024-01-31 12:54:07 +01:00
42d61cfc4c Core/HW/MMIO: Pass System through Read() and Write(). 2024-01-12 08:28:01 +01:00
b972329ed0 PowerPC: Add access size parameter to MMU::IsOptimizableRAMAddress
For correctness, we need to check not only the start address of the
memory access but also the end address.
2024-01-10 18:17:45 +01:00
465f17a882 PowerPC: Add constants for the two TLB indices
Just for readability.
2023-12-30 14:31:05 +01:00
a0da6788a3 MMU: Use MSR.IR for instruction reads. 2023-12-10 14:18:25 +01:00
c12725c916 MMU: Assert that the given XCheckTLBFlag is valid for the operation. 2023-12-10 14:18:25 +01:00
0d6a0724fd MMU: Always use data read for the PTE lookup in TranslatePageAddress. 2023-12-10 14:18:24 +01:00
5d2fc0147e MMU: Mark IsOpcodeFlag() and IsNoExceptionFlag() as constexpr. 2023-12-10 14:18:24 +01:00
166bd87f70 PowerPC: Unify "FromJit" MMU functions
This gets rid of the odd argument order we were using for JitArm64.
2023-11-26 14:51:16 +01:00
aa1311cd78 Merge pull request #12268 from JosJuice/fastmem-terminology
Jit: Define new terms related to fastmem
2023-11-12 19:44:45 +00:00
2333fc2701 MMU: Use VSID in segment register as additional TLB lookup key 2023-11-11 15:59:47 +00:00
18d777095b MMU: on DSI exception, don't set store bit on read 2023-11-08 16:06:11 +00:00
482da7975b Jit: Define new terms related to fastmem
Dolphin's JITs have a minor terminology problem: The term "fastmem" can
refer to either the system of switching between a fast path and a slow
path using backpatching, or to the fast path itself. To hopefully make
things clearer, I'm adding some new terms, defining the old and new
terms as follows:

Fastmem: The system of switching from a fast path to a slow path by
backpatching when an invalid memory access occurs.

Fast access: A code path that accesses guest memory without calling C++
code.

Slow access: A code path that accesses guest memory by calling C++ code.
2023-11-02 21:30:12 +01:00
5e74a8b850 Jit64: Don't make use of fastmem arena when dcache is enabled
Some code paths in EmuCodeBlock.cpp that were checking fastmem_arena
should really also be checking m_enable_dcache.

Because JitArm64 centralizes more or less all memory access to the
EmitBackpatchRoutine function and because that function already
contained a check, JitArm64 works fine without the additional checks
added by this commit. Regardless, I added the checks to MMU.cpp instead
of EmuCodeBlock.cpp where applicable so they would be available to
JitArm64. Maybe one day JitArm64 will need them if its code gets
restructured.
2023-10-31 19:43:40 +01:00
f19651e49b Merge pull request #11025 from AdmiralCurtiss/hle-printf
HLE_OS: Manually handle printfs from emulated software to prevent emulated software from crashing Dolphin with an invalid printf formatting string.
2023-08-20 01:31:49 +02:00
0bb5c88a22 Retrieve page table information from the data cache
Thanks to @mkwcat for identifying the problematic code.
2023-08-15 12:44:55 -04:00
7f29f0398c MMU: Add a HostGetU16String() function for wide strings used by emulated software. 2023-07-29 15:11:00 +02:00
23843583bf PowerPC: Refactor to class, move to System. 2023-04-09 21:48:37 +02:00
18f8ae37ab PowerPC/Expression: Pass System to EvaluateCondition(). 2023-04-05 20:09:31 +02:00
8dabd1a025 PowerPC/MMU: Refactor to class, move to System. 2023-03-28 03:47:51 +02:00
Mai
98fad9004b Merge pull request #11698 from AdmiralCurtiss/mmu-comments
PowerPC/MMU: Clean up old comments.
2023-03-27 10:32:19 -04:00
d7fabf37d6 PowerPC/MMU: Clean up old comments. 2023-03-26 15:19:48 +02:00
9217a9eba4 JitInterface: Refactor to class, move to System. 2023-03-26 14:38:07 +02:00
3006c23c85 Core/CPUThreadGuard: Fetch System from Guard. 2023-03-13 18:13:20 +01:00
3b364c5c16 HW/CPU: Refactor to class, move to System. 2023-03-08 12:23:37 +01:00
bf079d6d3a [[unlikely]] ASSERT
and other ASSERT usage changes
2023-03-02 19:54:15 -06:00
7cecb28bdf DolphinQt: Properly lock CPU before accessing emulated memory
This fixes a problem I was having where using frame advance with the
debugger open would frequently cause panic alerts about invalid addresses
due to the CPU thread changing MSR.DR while the host thread was trying
to access memory.

To aid in tracking down all the places where we weren't properly locking
the CPU, I've created a new type (in Core.h) that you have to pass as a
reference or pointer to functions that require running as the CPU thread.
2023-02-12 11:27:50 +01:00
ba1b624e1b PowerPC: Remove MSR macro. 2023-01-27 15:22:42 +01:00
2f3187eba9 PowerPC: Remove NPC macro. 2023-01-27 15:22:41 +01:00
be8d0b76ca PowerPC: Remove PC macro. 2023-01-27 15:22:41 +01:00
31483e492e PowerPC: Parametrize HID4 macro. 2023-01-27 15:22:40 +01:00
49eeb986c6 PowerPC: Parametrize HID0 macro. 2023-01-27 15:22:40 +01:00
21c29bad6b Merge pull request #11407 from AdmiralCurtiss/globals-gpfifo
HW/GPFifo: Refactor to class, move to Core::System.
2023-01-09 17:09:48 +01:00
eeeab3c3be Merge pull request #11183 from TheLordScruffy/write-back-cache
Implement PowerPC data cache
2023-01-09 17:09:32 +01:00
fbcaf83d30 HW/GPFifo: Refactor to class, move to Core::System. 2023-01-06 05:33:21 +01:00
74e1577a2c HW/ProcessorInterface: Refactor to class, move to Core::System. 2023-01-04 03:00:10 +01:00
9d39647f9e Fix PPC cache code formatting 2023-01-02 02:33:57 -05:00
cf16f49068 PowerPC: Fix theoretically possible infinite loop in WriteToHardware
`em_address + size` can overflow and become 0. It shouldn't happen with
the kinds of memory mappings games use in practice, though.
2022-12-25 12:29:13 +01:00
454537d53e Replace BitUtils with C++20: RotateLeft/RotateRight
Now that we've flipped the C++20 switch, let's start making use of
the nice new <bit> header.

I'm planning on handling this move away from BitUtils.h incrementally
in a series of PRs. There may be a few functions remaining in
BitUtils.h by the end that C++20 doesn't have any equivalents for.
2022-12-11 08:59:18 +01:00