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19ea546a0a
VideoCommon/OpcodeDecoding: Make use of if constexpr
1461 lines
48 KiB
C++
1461 lines
48 KiB
C++
// Copyright 2009 Dolphin Emulator Project
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// Licensed under GPLv2+
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// Refer to the license.txt file included.
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#include "VideoCommon/BPStructs.h"
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#include <cmath>
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#include <cstring>
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#include <string>
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#include <fmt/format.h>
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#include "Common/CommonTypes.h"
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#include "Common/Logging/Log.h"
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#include "Core/ConfigManager.h"
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#include "Core/CoreTiming.h"
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#include "Core/FifoPlayer/FifoPlayer.h"
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#include "Core/FifoPlayer/FifoRecorder.h"
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#include "Core/HW/Memmap.h"
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#include "Core/HW/VideoInterface.h"
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#include "VideoCommon/BPFunctions.h"
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#include "VideoCommon/BPMemory.h"
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#include "VideoCommon/BoundingBox.h"
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#include "VideoCommon/Fifo.h"
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#include "VideoCommon/FramebufferManager.h"
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#include "VideoCommon/GeometryShaderManager.h"
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#include "VideoCommon/OpcodeDecoding.h"
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#include "VideoCommon/PerfQueryBase.h"
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#include "VideoCommon/PixelEngine.h"
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#include "VideoCommon/PixelShaderManager.h"
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#include "VideoCommon/RenderBase.h"
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#include "VideoCommon/TextureCacheBase.h"
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#include "VideoCommon/TextureDecoder.h"
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#include "VideoCommon/VertexShaderManager.h"
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#include "VideoCommon/VideoBackendBase.h"
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#include "VideoCommon/VideoCommon.h"
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#include "VideoCommon/VideoConfig.h"
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using namespace BPFunctions;
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static const float s_gammaLUT[] = {1.0f, 1.7f, 2.2f, 1.0f};
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void BPInit()
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{
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memset(&bpmem, 0, sizeof(bpmem));
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bpmem.bpMask = 0xFFFFFF;
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}
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static void BPWritten(const BPCmd& bp)
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{
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/*
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----------------------------------------------------------------------------------------------------------------
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Purpose: Writes to the BP registers
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Called: At the end of every: OpcodeDecoding.cpp ExecuteDisplayList > Decode() > LoadBPReg
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How It Works: First the pipeline is flushed then update the bpmem with the new value.
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Some of the BP cases have to call certain functions while others just update the bpmem.
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some bp cases check the changes variable, because they might not have to be updated all
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the time
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NOTE: it seems not all bp cases like checking changes, so calling if (bp.changes == 0 ? false :
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true)
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had to be ditched and the games seem to work fine with out it.
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NOTE2: Yet Another GameCube Documentation calls them Bypass Raster State Registers but possibly
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completely wrong
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NOTE3: This controls the register groups: RAS1/2, SU, TF, TEV, C/Z, PEC
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TODO: Turn into function table. The (future) DisplayList (DL) jit can then call the functions
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directly,
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getting rid of dynamic dispatch. Unfortunately, few games use DLs properly - most\
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just stuff geometry in them and don't put state changes there
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----------------------------------------------------------------------------------------------------------------
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*/
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if (((s32*)&bpmem)[bp.address] == bp.newvalue)
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{
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if (!(bp.address == BPMEM_TRIGGER_EFB_COPY || bp.address == BPMEM_CLEARBBOX1 ||
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bp.address == BPMEM_CLEARBBOX2 || bp.address == BPMEM_SETDRAWDONE ||
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bp.address == BPMEM_PE_TOKEN_ID || bp.address == BPMEM_PE_TOKEN_INT_ID ||
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bp.address == BPMEM_LOADTLUT0 || bp.address == BPMEM_LOADTLUT1 ||
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bp.address == BPMEM_TEXINVALIDATE || bp.address == BPMEM_PRELOAD_MODE ||
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bp.address == BPMEM_CLEAR_PIXEL_PERF))
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{
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return;
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}
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}
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FlushPipeline();
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((u32*)&bpmem)[bp.address] = bp.newvalue;
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switch (bp.address)
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{
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case BPMEM_GENMODE: // Set the Generation Mode
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PRIM_LOG("genmode: texgen=%d, col=%d, multisampling=%d, tev=%d, cullmode=%d, ind=%d, zfeeze=%d",
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(u32)bpmem.genMode.numtexgens, (u32)bpmem.genMode.numcolchans,
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(u32)bpmem.genMode.multisampling, (u32)bpmem.genMode.numtevstages + 1,
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(u32)bpmem.genMode.cullmode, (u32)bpmem.genMode.numindstages,
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(u32)bpmem.genMode.zfreeze);
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if (bp.changes)
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PixelShaderManager::SetGenModeChanged();
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// Only call SetGenerationMode when cull mode changes.
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if (bp.changes & 0xC000)
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SetGenerationMode();
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return;
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case BPMEM_IND_MTXA: // Index Matrix Changed
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case BPMEM_IND_MTXB:
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case BPMEM_IND_MTXC:
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case BPMEM_IND_MTXA + 3:
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case BPMEM_IND_MTXB + 3:
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case BPMEM_IND_MTXC + 3:
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case BPMEM_IND_MTXA + 6:
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case BPMEM_IND_MTXB + 6:
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case BPMEM_IND_MTXC + 6:
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if (bp.changes)
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PixelShaderManager::SetIndMatrixChanged((bp.address - BPMEM_IND_MTXA) / 3);
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return;
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case BPMEM_RAS1_SS0: // Index Texture Coordinate Scale 0
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if (bp.changes)
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PixelShaderManager::SetIndTexScaleChanged(false);
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return;
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case BPMEM_RAS1_SS1: // Index Texture Coordinate Scale 1
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if (bp.changes)
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PixelShaderManager::SetIndTexScaleChanged(true);
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return;
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// ----------------
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// Scissor Control
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// ----------------
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case BPMEM_SCISSORTL: // Scissor Rectable Top, Left
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case BPMEM_SCISSORBR: // Scissor Rectable Bottom, Right
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case BPMEM_SCISSOROFFSET: // Scissor Offset
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SetScissor();
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SetViewport();
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VertexShaderManager::SetViewportChanged();
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GeometryShaderManager::SetViewportChanged();
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return;
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case BPMEM_LINEPTWIDTH: // Line Width
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GeometryShaderManager::SetLinePtWidthChanged();
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return;
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case BPMEM_ZMODE: // Depth Control
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PRIM_LOG("zmode: test=%u, func=%u, upd=%u", bpmem.zmode.testenable.Value(),
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bpmem.zmode.func.Value(), bpmem.zmode.updateenable.Value());
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SetDepthMode();
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PixelShaderManager::SetZModeControl();
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return;
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case BPMEM_BLENDMODE: // Blending Control
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if (bp.changes & 0xFFFF)
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{
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PRIM_LOG("blendmode: en=%u, open=%u, colupd=%u, alphaupd=%u, dst=%u, src=%u, sub=%u, mode=%u",
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bpmem.blendmode.blendenable.Value(), bpmem.blendmode.logicopenable.Value(),
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bpmem.blendmode.colorupdate.Value(), bpmem.blendmode.alphaupdate.Value(),
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bpmem.blendmode.dstfactor.Value(), bpmem.blendmode.srcfactor.Value(),
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bpmem.blendmode.subtract.Value(), bpmem.blendmode.logicmode.Value());
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SetBlendMode();
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PixelShaderManager::SetBlendModeChanged();
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}
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return;
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case BPMEM_CONSTANTALPHA: // Set Destination Alpha
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PRIM_LOG("constalpha: alp=%d, en=%d", bpmem.dstalpha.alpha.Value(),
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bpmem.dstalpha.enable.Value());
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if (bp.changes)
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{
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PixelShaderManager::SetAlpha();
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PixelShaderManager::SetDestAlphaChanged();
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}
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if (bp.changes & 0x100)
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SetBlendMode();
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return;
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// This is called when the game is done drawing the new frame (eg: like in DX: Begin(); Draw();
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// End();)
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// Triggers an interrupt on the PPC side so that the game knows when the GPU has finished drawing.
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// Tokens are similar.
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case BPMEM_SETDRAWDONE:
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switch (bp.newvalue & 0xFF)
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{
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case 0x02:
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g_texture_cache->FlushEFBCopies();
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g_framebuffer_manager->InvalidatePeekCache(false);
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if (!Fifo::UseDeterministicGPUThread())
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PixelEngine::SetFinish(); // may generate interrupt
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DEBUG_LOG(VIDEO, "GXSetDrawDone SetPEFinish (value: 0x%02X)", (bp.newvalue & 0xFFFF));
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return;
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default:
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WARN_LOG(VIDEO, "GXSetDrawDone ??? (value 0x%02X)", (bp.newvalue & 0xFFFF));
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return;
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}
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return;
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case BPMEM_PE_TOKEN_ID: // Pixel Engine Token ID
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g_texture_cache->FlushEFBCopies();
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g_framebuffer_manager->InvalidatePeekCache(false);
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if (!Fifo::UseDeterministicGPUThread())
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PixelEngine::SetToken(static_cast<u16>(bp.newvalue & 0xFFFF), false);
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DEBUG_LOG(VIDEO, "SetPEToken 0x%04x", (bp.newvalue & 0xFFFF));
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return;
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case BPMEM_PE_TOKEN_INT_ID: // Pixel Engine Interrupt Token ID
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g_texture_cache->FlushEFBCopies();
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g_framebuffer_manager->InvalidatePeekCache(false);
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if (!Fifo::UseDeterministicGPUThread())
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PixelEngine::SetToken(static_cast<u16>(bp.newvalue & 0xFFFF), true);
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DEBUG_LOG(VIDEO, "SetPEToken + INT 0x%04x", (bp.newvalue & 0xFFFF));
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return;
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// ------------------------
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// EFB copy command. This copies a rectangle from the EFB to either RAM in a texture format or to
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// XFB as YUYV.
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// It can also optionally clear the EFB while copying from it. To emulate this, we of course copy
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// first and clear afterwards.
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case BPMEM_TRIGGER_EFB_COPY: // Copy EFB Region or Render to the XFB or Clear the screen.
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{
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// The bottom right is within the rectangle
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// The values in bpmem.copyTexSrcXY and bpmem.copyTexSrcWH are updated in case 0x49 and 0x4a in
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// this function
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u32 destAddr = bpmem.copyTexDest << 5;
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u32 destStride = bpmem.copyMipMapStrideChannels << 5;
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MathUtil::Rectangle<int> srcRect;
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srcRect.left = static_cast<int>(bpmem.copyTexSrcXY.x);
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srcRect.top = static_cast<int>(bpmem.copyTexSrcXY.y);
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// Here Width+1 like Height, otherwise some textures are corrupted already since the native
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// resolution.
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srcRect.right = static_cast<int>(bpmem.copyTexSrcXY.x + bpmem.copyTexSrcWH.x + 1);
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srcRect.bottom = static_cast<int>(bpmem.copyTexSrcXY.y + bpmem.copyTexSrcWH.y + 1);
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// Since the copy X and Y coordinates/sizes are 10-bit, the game can configure a copy region up
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// to 1024x1024. Hardware tests have found that the number of bytes written does not depend on
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// the configured stride, instead it is based on the size registers, writing beyond the length
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// of a single row. The data written for the pixels which lie outside the EFB bounds does not
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// wrap around instead returning different colors based on the pixel format of the EFB. This
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// suggests it's not based on coordinates, but instead on memory addresses. The effect of a
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// within-bounds size but out-of-bounds offset (e.g. offset 320,0, size 640,480) are the same.
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// As it would be difficult to emulate the exact behavior of out-of-bounds reads, instead of
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// writing the junk data, we don't write anything to RAM at all for over-sized copies, and clamp
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// to the EFB borders for over-offset copies. The arcade virtual console games (e.g. 1942) are
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// known for configuring these out-of-range copies.
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int copy_width = srcRect.GetWidth();
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int copy_height = srcRect.GetHeight();
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if (srcRect.right > EFB_WIDTH || srcRect.bottom > EFB_HEIGHT)
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{
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WARN_LOG(VIDEO, "Oversized EFB copy: %dx%d (offset %d,%d stride %u)", copy_width, copy_height,
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srcRect.left, srcRect.top, destStride);
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// Adjust the copy size to fit within the EFB. So that we don't end up with a stretched image,
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// instead of clamping the source rectangle, we reduce it by the over-sized amount.
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if (copy_width > EFB_WIDTH)
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{
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srcRect.right -= copy_width - EFB_WIDTH;
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copy_width = EFB_WIDTH;
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}
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if (copy_height > EFB_HEIGHT)
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{
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srcRect.bottom -= copy_height - EFB_HEIGHT;
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copy_height = EFB_HEIGHT;
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}
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}
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// Check if we are to copy from the EFB or draw to the XFB
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const UPE_Copy PE_copy = bpmem.triggerEFBCopy;
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if (PE_copy.copy_to_xfb == 0)
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{
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// bpmem.zcontrol.pixel_format to PEControl::Z24 is when the game wants to copy from ZBuffer
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// (Zbuffer uses 24-bit Format)
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static constexpr CopyFilterCoefficients::Values filter_coefficients = {
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{0, 0, 21, 22, 21, 0, 0}};
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bool is_depth_copy = bpmem.zcontrol.pixel_format == PEControl::Z24;
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g_texture_cache->CopyRenderTargetToTexture(
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destAddr, PE_copy.tp_realFormat(), copy_width, copy_height, destStride, is_depth_copy,
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srcRect, !!PE_copy.intensity_fmt, !!PE_copy.half_scale, 1.0f, 1.0f,
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bpmem.triggerEFBCopy.clamp_top, bpmem.triggerEFBCopy.clamp_bottom, filter_coefficients);
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}
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else
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{
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// We should be able to get away with deactivating the current bbox tracking
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// here. Not sure if there's a better spot to put this.
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// the number of lines copied is determined by the y scale * source efb height
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BoundingBox::Disable();
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float yScale;
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if (PE_copy.scale_invert)
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yScale = 256.0f / static_cast<float>(bpmem.dispcopyyscale);
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else
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yScale = static_cast<float>(bpmem.dispcopyyscale) / 256.0f;
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float num_xfb_lines = 1.0f + bpmem.copyTexSrcWH.y * yScale;
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u32 height = static_cast<u32>(num_xfb_lines);
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DEBUG_LOG(VIDEO,
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"RenderToXFB: destAddr: %08x | srcRect {%d %d %d %d} | fbWidth: %u | "
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"fbStride: %u | fbHeight: %u | yScale: %f",
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destAddr, srcRect.left, srcRect.top, srcRect.right, srcRect.bottom,
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bpmem.copyTexSrcWH.x + 1, destStride, height, yScale);
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bool is_depth_copy = bpmem.zcontrol.pixel_format == PEControl::Z24;
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g_texture_cache->CopyRenderTargetToTexture(
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destAddr, EFBCopyFormat::XFB, copy_width, height, destStride, is_depth_copy, srcRect,
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false, false, yScale, s_gammaLUT[PE_copy.gamma], bpmem.triggerEFBCopy.clamp_top,
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bpmem.triggerEFBCopy.clamp_bottom, bpmem.copyfilter.GetCoefficients());
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// This stays in to signal end of a "frame"
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g_renderer->RenderToXFB(destAddr, srcRect, destStride, height, s_gammaLUT[PE_copy.gamma]);
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if (g_ActiveConfig.bImmediateXFB)
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{
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// below div two to convert from bytes to pixels - it expects width, not stride
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g_renderer->Swap(destAddr, destStride / 2, destStride, height, CoreTiming::GetTicks());
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}
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else
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{
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if (FifoPlayer::GetInstance().IsRunningWithFakeVideoInterfaceUpdates())
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{
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VideoInterface::FakeVIUpdate(destAddr, srcRect.GetWidth(), destStride, height);
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}
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}
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}
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// Clear the rectangular region after copying it.
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if (PE_copy.clear)
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{
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ClearScreen(srcRect);
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}
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return;
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}
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case BPMEM_LOADTLUT0: // This one updates bpmem.tlutXferSrc, no need to do anything here.
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return;
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case BPMEM_LOADTLUT1: // Load a Texture Look Up Table
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{
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u32 tlutTMemAddr = (bp.newvalue & 0x3FF) << 9;
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u32 tlutXferCount = (bp.newvalue & 0x1FFC00) >> 5;
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u32 addr = bpmem.tmem_config.tlut_src << 5;
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// The GameCube ignores the upper bits of this address. Some games (WW, MKDD) set them.
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if (!SConfig::GetInstance().bWii)
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addr = addr & 0x01FFFFFF;
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Memory::CopyFromEmu(texMem + tlutTMemAddr, addr, tlutXferCount);
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if (OpcodeDecoder::g_record_fifo_data)
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FifoRecorder::GetInstance().UseMemory(addr, tlutXferCount, MemoryUpdate::TMEM);
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TextureCacheBase::InvalidateAllBindPoints();
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return;
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}
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case BPMEM_FOGRANGE: // Fog Settings Control
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case BPMEM_FOGRANGE + 1:
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case BPMEM_FOGRANGE + 2:
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case BPMEM_FOGRANGE + 3:
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case BPMEM_FOGRANGE + 4:
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case BPMEM_FOGRANGE + 5:
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if (bp.changes)
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PixelShaderManager::SetFogRangeAdjustChanged();
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return;
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case BPMEM_FOGPARAM0:
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case BPMEM_FOGBMAGNITUDE:
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case BPMEM_FOGBEXPONENT:
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case BPMEM_FOGPARAM3:
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if (bp.changes)
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PixelShaderManager::SetFogParamChanged();
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return;
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case BPMEM_FOGCOLOR: // Fog Color
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if (bp.changes)
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PixelShaderManager::SetFogColorChanged();
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return;
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case BPMEM_ALPHACOMPARE: // Compare Alpha Values
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PRIM_LOG("alphacmp: ref0=%d, ref1=%d, comp0=%d, comp1=%d, logic=%d", (int)bpmem.alpha_test.ref0,
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(int)bpmem.alpha_test.ref1, (int)bpmem.alpha_test.comp0, (int)bpmem.alpha_test.comp1,
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(int)bpmem.alpha_test.logic);
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if (bp.changes & 0xFFFF)
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PixelShaderManager::SetAlpha();
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if (bp.changes)
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{
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PixelShaderManager::SetAlphaTestChanged();
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SetBlendMode();
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}
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return;
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case BPMEM_BIAS: // BIAS
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PRIM_LOG("ztex bias=0x%x", bpmem.ztex1.bias.Value());
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if (bp.changes)
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PixelShaderManager::SetZTextureBias();
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return;
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case BPMEM_ZTEX2: // Z Texture type
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{
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if (bp.changes & 3)
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PixelShaderManager::SetZTextureTypeChanged();
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if (bp.changes & 12)
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PixelShaderManager::SetZTextureOpChanged();
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#if defined(_DEBUG) || defined(DEBUGFAST)
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const char* pzop[] = {"DISABLE", "ADD", "REPLACE", "?"};
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const char* pztype[] = {"Z8", "Z16", "Z24", "?"};
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PRIM_LOG("ztex op=%s, type=%s", pzop[bpmem.ztex2.op], pztype[bpmem.ztex2.type]);
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#endif
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}
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return;
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// ----------------------------------
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// Display Copy Filtering Control - GX_SetCopyFilter(u8 aa,u8 sample_pattern[12][2],u8 vf,u8
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// vfilter[7])
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// Fields: Destination, Frame2Field, Gamma, Source
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// ----------------------------------
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case BPMEM_DISPLAYCOPYFILTER: // if (aa) { use sample_pattern } else { use 666666 }
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case BPMEM_DISPLAYCOPYFILTER + 1: // if (aa) { use sample_pattern } else { use 666666 }
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case BPMEM_DISPLAYCOPYFILTER + 2: // if (aa) { use sample_pattern } else { use 666666 }
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case BPMEM_DISPLAYCOPYFILTER + 3: // if (aa) { use sample_pattern } else { use 666666 }
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case BPMEM_COPYFILTER0: // if (vf) { use vfilter } else { use 595000 }
|
|
case BPMEM_COPYFILTER1: // if (vf) { use vfilter } else { use 000015 }
|
|
return;
|
|
// -----------------------------------
|
|
// Interlacing Control
|
|
// -----------------------------------
|
|
case BPMEM_FIELDMASK: // GX_SetFieldMask(u8 even_mask,u8 odd_mask)
|
|
case BPMEM_FIELDMODE: // GX_SetFieldMode(u8 field_mode,u8 half_aspect_ratio)
|
|
// TODO
|
|
return;
|
|
// ----------------------------------------
|
|
// Unimportant regs (Clock, Perf, ...)
|
|
// ----------------------------------------
|
|
case BPMEM_BUSCLOCK0: // TB Bus Clock ?
|
|
case BPMEM_BUSCLOCK1: // TB Bus Clock ?
|
|
case BPMEM_PERF0_TRI: // Perf: Triangles
|
|
case BPMEM_PERF0_QUAD: // Perf: Quads
|
|
case BPMEM_PERF1: // Perf: Some Clock, Texels, TX, TC
|
|
return;
|
|
// ----------------
|
|
// EFB Copy config
|
|
// ----------------
|
|
case BPMEM_EFB_TL: // EFB Source Rect. Top, Left
|
|
case BPMEM_EFB_BR: // EFB Source Rect. Bottom, Right (w, h - 1)
|
|
case BPMEM_EFB_ADDR: // EFB Target Address
|
|
return;
|
|
// --------------
|
|
// Clear Config
|
|
// --------------
|
|
case BPMEM_CLEAR_AR: // Alpha and Red Components
|
|
case BPMEM_CLEAR_GB: // Green and Blue Components
|
|
case BPMEM_CLEAR_Z: // Z Components (24-bit Zbuffer)
|
|
return;
|
|
// -------------------------
|
|
// Bounding Box Control
|
|
// -------------------------
|
|
case BPMEM_CLEARBBOX1:
|
|
case BPMEM_CLEARBBOX2:
|
|
{
|
|
const u8 offset = bp.address & 2;
|
|
BoundingBox::Enable();
|
|
|
|
if (g_ActiveConfig.backend_info.bSupportsBBox && g_ActiveConfig.bBBoxEnable)
|
|
{
|
|
g_renderer->BBoxWrite(offset, bp.newvalue & 0x3ff);
|
|
g_renderer->BBoxWrite(offset + 1, bp.newvalue >> 10);
|
|
}
|
|
}
|
|
return;
|
|
case BPMEM_TEXINVALIDATE:
|
|
// TODO: Needs some restructuring in TextureCacheBase.
|
|
TextureCacheBase::InvalidateAllBindPoints();
|
|
return;
|
|
|
|
case BPMEM_ZCOMPARE: // Set the Z-Compare and EFB pixel format
|
|
OnPixelFormatChange();
|
|
if (bp.changes & 7)
|
|
SetBlendMode(); // dual source could be activated by changing to PIXELFMT_RGBA6_Z24
|
|
PixelShaderManager::SetZModeControl();
|
|
return;
|
|
|
|
case BPMEM_MIPMAP_STRIDE: // MipMap Stride Channel
|
|
case BPMEM_COPYYSCALE: // Display Copy Y Scale
|
|
|
|
/* 24 RID
|
|
* 21 BC3 - Ind. Tex Stage 3 NTexCoord
|
|
* 18 BI3 - Ind. Tex Stage 3 NTexMap
|
|
* 15 BC2 - Ind. Tex Stage 2 NTexCoord
|
|
* 12 BI2 - Ind. Tex Stage 2 NTexMap
|
|
* 9 BC1 - Ind. Tex Stage 1 NTexCoord
|
|
* 6 BI1 - Ind. Tex Stage 1 NTexMap
|
|
* 3 BC0 - Ind. Tex Stage 0 NTexCoord
|
|
* 0 BI0 - Ind. Tex Stage 0 NTexMap */
|
|
case BPMEM_IREF:
|
|
{
|
|
if (bp.changes)
|
|
PixelShaderManager::SetTevIndirectChanged();
|
|
return;
|
|
}
|
|
|
|
case BPMEM_TEV_KSEL: // Texture Environment Swap Mode Table 0
|
|
case BPMEM_TEV_KSEL + 1: // Texture Environment Swap Mode Table 1
|
|
case BPMEM_TEV_KSEL + 2: // Texture Environment Swap Mode Table 2
|
|
case BPMEM_TEV_KSEL + 3: // Texture Environment Swap Mode Table 3
|
|
case BPMEM_TEV_KSEL + 4: // Texture Environment Swap Mode Table 4
|
|
case BPMEM_TEV_KSEL + 5: // Texture Environment Swap Mode Table 5
|
|
case BPMEM_TEV_KSEL + 6: // Texture Environment Swap Mode Table 6
|
|
case BPMEM_TEV_KSEL + 7: // Texture Environment Swap Mode Table 7
|
|
PixelShaderManager::SetTevKSel(bp.address - BPMEM_TEV_KSEL, bp.newvalue);
|
|
return;
|
|
|
|
/* This Register can be used to limit to which bits of BP registers is
|
|
* actually written to. The mask is only valid for the next BP write,
|
|
* and will reset itself afterwards. It's handled as a special case in
|
|
* LoadBPReg. */
|
|
case BPMEM_BP_MASK:
|
|
|
|
case BPMEM_IND_IMASK: // Index Mask ?
|
|
case BPMEM_REVBITS: // Always set to 0x0F when GX_InitRevBits() is called.
|
|
return;
|
|
|
|
case BPMEM_CLEAR_PIXEL_PERF:
|
|
// GXClearPixMetric writes 0xAAA here, Sunshine alternates this register between values 0x000
|
|
// and 0xAAA
|
|
if (PerfQueryBase::ShouldEmulate())
|
|
g_perf_query->ResetQuery();
|
|
return;
|
|
|
|
case BPMEM_PRELOAD_ADDR:
|
|
case BPMEM_PRELOAD_TMEMEVEN:
|
|
case BPMEM_PRELOAD_TMEMODD: // Used when PRELOAD_MODE is set
|
|
return;
|
|
|
|
case BPMEM_PRELOAD_MODE: // Set to 0 when GX_TexModeSync() is called.
|
|
// if this is different from 0, manual TMEM management is used (GX_PreloadEntireTexture).
|
|
if (bp.newvalue != 0)
|
|
{
|
|
// TODO: Not quite sure if this is completely correct (likely not)
|
|
// NOTE: libogc's implementation of GX_PreloadEntireTexture seems flawed, so it's not
|
|
// necessarily a good reference for RE'ing this feature.
|
|
|
|
BPS_TmemConfig& tmem_cfg = bpmem.tmem_config;
|
|
u32 src_addr = tmem_cfg.preload_addr << 5; // TODO: Should we add mask here on GC?
|
|
u32 bytes_read = 0;
|
|
u32 tmem_addr_even = tmem_cfg.preload_tmem_even * TMEM_LINE_SIZE;
|
|
|
|
if (tmem_cfg.preload_tile_info.type != 3)
|
|
{
|
|
bytes_read = tmem_cfg.preload_tile_info.count * TMEM_LINE_SIZE;
|
|
if (tmem_addr_even + bytes_read > TMEM_SIZE)
|
|
bytes_read = TMEM_SIZE - tmem_addr_even;
|
|
|
|
Memory::CopyFromEmu(texMem + tmem_addr_even, src_addr, bytes_read);
|
|
}
|
|
else // RGBA8 tiles (and CI14, but that might just be stupid libogc!)
|
|
{
|
|
u8* src_ptr = Memory::GetPointer(src_addr);
|
|
|
|
// AR and GB tiles are stored in separate TMEM banks => can't use a single memcpy for
|
|
// everything
|
|
u32 tmem_addr_odd = tmem_cfg.preload_tmem_odd * TMEM_LINE_SIZE;
|
|
|
|
for (u32 i = 0; i < tmem_cfg.preload_tile_info.count; ++i)
|
|
{
|
|
if (tmem_addr_even + TMEM_LINE_SIZE > TMEM_SIZE ||
|
|
tmem_addr_odd + TMEM_LINE_SIZE > TMEM_SIZE)
|
|
break;
|
|
|
|
memcpy(texMem + tmem_addr_even, src_ptr + bytes_read, TMEM_LINE_SIZE);
|
|
memcpy(texMem + tmem_addr_odd, src_ptr + bytes_read + TMEM_LINE_SIZE, TMEM_LINE_SIZE);
|
|
tmem_addr_even += TMEM_LINE_SIZE;
|
|
tmem_addr_odd += TMEM_LINE_SIZE;
|
|
bytes_read += TMEM_LINE_SIZE * 2;
|
|
}
|
|
}
|
|
|
|
if (OpcodeDecoder::g_record_fifo_data)
|
|
FifoRecorder::GetInstance().UseMemory(src_addr, bytes_read, MemoryUpdate::TMEM);
|
|
|
|
TextureCacheBase::InvalidateAllBindPoints();
|
|
}
|
|
return;
|
|
|
|
// ---------------------------------------------------
|
|
// Set the TEV Color
|
|
// ---------------------------------------------------
|
|
//
|
|
// NOTE: Each of these registers actually maps to two variables internally.
|
|
// There's a bit that specifies which one is currently written to.
|
|
//
|
|
// NOTE: Some games write only to the RA register (or only to the BG register).
|
|
// We may not assume that the unwritten register holds a valid value, hence
|
|
// both component pairs need to be loaded individually.
|
|
case BPMEM_TEV_COLOR_RA:
|
|
case BPMEM_TEV_COLOR_RA + 2:
|
|
case BPMEM_TEV_COLOR_RA + 4:
|
|
case BPMEM_TEV_COLOR_RA + 6:
|
|
{
|
|
int num = (bp.address >> 1) & 0x3;
|
|
if (bpmem.tevregs[num].type_ra)
|
|
{
|
|
PixelShaderManager::SetTevKonstColor(num, 0, (s32)bpmem.tevregs[num].red);
|
|
PixelShaderManager::SetTevKonstColor(num, 3, (s32)bpmem.tevregs[num].alpha);
|
|
}
|
|
else
|
|
{
|
|
PixelShaderManager::SetTevColor(num, 0, (s32)bpmem.tevregs[num].red);
|
|
PixelShaderManager::SetTevColor(num, 3, (s32)bpmem.tevregs[num].alpha);
|
|
}
|
|
return;
|
|
}
|
|
|
|
case BPMEM_TEV_COLOR_BG:
|
|
case BPMEM_TEV_COLOR_BG + 2:
|
|
case BPMEM_TEV_COLOR_BG + 4:
|
|
case BPMEM_TEV_COLOR_BG + 6:
|
|
{
|
|
int num = (bp.address >> 1) & 0x3;
|
|
if (bpmem.tevregs[num].type_bg)
|
|
{
|
|
PixelShaderManager::SetTevKonstColor(num, 1, (s32)bpmem.tevregs[num].green);
|
|
PixelShaderManager::SetTevKonstColor(num, 2, (s32)bpmem.tevregs[num].blue);
|
|
}
|
|
else
|
|
{
|
|
PixelShaderManager::SetTevColor(num, 1, (s32)bpmem.tevregs[num].green);
|
|
PixelShaderManager::SetTevColor(num, 2, (s32)bpmem.tevregs[num].blue);
|
|
}
|
|
return;
|
|
}
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
switch (bp.address & 0xFC) // Texture sampler filter
|
|
{
|
|
// -------------------------
|
|
// Texture Environment Order
|
|
// -------------------------
|
|
case BPMEM_TREF:
|
|
case BPMEM_TREF + 4:
|
|
PixelShaderManager::SetTevOrder(bp.address - BPMEM_TREF, bp.newvalue);
|
|
return;
|
|
// ----------------------
|
|
// Set wrap size
|
|
// ----------------------
|
|
case BPMEM_SU_SSIZE: // Matches BPMEM_SU_TSIZE too
|
|
case BPMEM_SU_SSIZE + 4:
|
|
case BPMEM_SU_SSIZE + 8:
|
|
case BPMEM_SU_SSIZE + 12:
|
|
if (bp.changes)
|
|
{
|
|
PixelShaderManager::SetTexCoordChanged((bp.address - BPMEM_SU_SSIZE) >> 1);
|
|
GeometryShaderManager::SetTexCoordChanged((bp.address - BPMEM_SU_SSIZE) >> 1);
|
|
}
|
|
return;
|
|
// ------------------------
|
|
// BPMEM_TX_SETMODE0 - (Texture lookup and filtering mode) LOD/BIAS Clamp, MaxAnsio, LODBIAS,
|
|
// DiagLoad, Min Filter, Mag Filter, Wrap T, S
|
|
// BPMEM_TX_SETMODE1 - (LOD Stuff) - Max LOD, Min LOD
|
|
// ------------------------
|
|
case BPMEM_TX_SETMODE0: // (0x90 for linear)
|
|
case BPMEM_TX_SETMODE0_4:
|
|
TextureCacheBase::InvalidateAllBindPoints();
|
|
return;
|
|
|
|
case BPMEM_TX_SETMODE1:
|
|
case BPMEM_TX_SETMODE1_4:
|
|
TextureCacheBase::InvalidateAllBindPoints();
|
|
return;
|
|
// --------------------------------------------
|
|
// BPMEM_TX_SETIMAGE0 - Texture width, height, format
|
|
// BPMEM_TX_SETIMAGE1 - even LOD address in TMEM - Image Type, Cache Height, Cache Width, TMEM
|
|
// Offset
|
|
// BPMEM_TX_SETIMAGE2 - odd LOD address in TMEM - Cache Height, Cache Width, TMEM Offset
|
|
// BPMEM_TX_SETIMAGE3 - Address of Texture in main memory
|
|
// --------------------------------------------
|
|
case BPMEM_TX_SETIMAGE0:
|
|
case BPMEM_TX_SETIMAGE0_4:
|
|
case BPMEM_TX_SETIMAGE1:
|
|
case BPMEM_TX_SETIMAGE1_4:
|
|
case BPMEM_TX_SETIMAGE2:
|
|
case BPMEM_TX_SETIMAGE2_4:
|
|
case BPMEM_TX_SETIMAGE3:
|
|
case BPMEM_TX_SETIMAGE3_4:
|
|
TextureCacheBase::InvalidateAllBindPoints();
|
|
return;
|
|
// -------------------------------
|
|
// Set a TLUT
|
|
// BPMEM_TX_SETTLUT - Format, TMEM Offset (offset of TLUT from start of TMEM high bank > > 5)
|
|
// -------------------------------
|
|
case BPMEM_TX_SETTLUT:
|
|
case BPMEM_TX_SETTLUT_4:
|
|
TextureCacheBase::InvalidateAllBindPoints();
|
|
return;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
switch (bp.address & 0xF0)
|
|
{
|
|
// --------------
|
|
// Indirect Tev
|
|
// --------------
|
|
case BPMEM_IND_CMD:
|
|
PixelShaderManager::SetTevIndirectChanged();
|
|
return;
|
|
// --------------------------------------------------
|
|
// Set Color/Alpha of a Tev
|
|
// BPMEM_TEV_COLOR_ENV - Dest, Shift, Clamp, Sub, Bias, Sel A, Sel B, Sel C, Sel D
|
|
// BPMEM_TEV_ALPHA_ENV - Dest, Shift, Clamp, Sub, Bias, Sel A, Sel B, Sel C, Sel D, T Swap, R Swap
|
|
// --------------------------------------------------
|
|
case BPMEM_TEV_COLOR_ENV: // Texture Environment 1
|
|
case BPMEM_TEV_COLOR_ENV + 16:
|
|
PixelShaderManager::SetTevCombiner((bp.address - BPMEM_TEV_COLOR_ENV) >> 1,
|
|
(bp.address - BPMEM_TEV_COLOR_ENV) & 1, bp.newvalue);
|
|
return;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
WARN_LOG(VIDEO, "Unknown BP opcode: address = 0x%08x value = 0x%08x", bp.address, bp.newvalue);
|
|
}
|
|
|
|
// Call browser: OpcodeDecoding.cpp ExecuteDisplayList > Decode() > LoadBPReg()
|
|
void LoadBPReg(u32 value0)
|
|
{
|
|
int regNum = value0 >> 24;
|
|
int oldval = ((u32*)&bpmem)[regNum];
|
|
int newval = (oldval & ~bpmem.bpMask) | (value0 & bpmem.bpMask);
|
|
int changes = (oldval ^ newval) & 0xFFFFFF;
|
|
|
|
BPCmd bp = {regNum, changes, newval};
|
|
|
|
// Reset the mask register if we're not trying to set it ourselves.
|
|
if (regNum != BPMEM_BP_MASK)
|
|
bpmem.bpMask = 0xFFFFFF;
|
|
|
|
BPWritten(bp);
|
|
}
|
|
|
|
void LoadBPRegPreprocess(u32 value0)
|
|
{
|
|
int regNum = value0 >> 24;
|
|
// masking could hypothetically be a problem
|
|
u32 newval = value0 & 0xffffff;
|
|
switch (regNum)
|
|
{
|
|
case BPMEM_SETDRAWDONE:
|
|
if ((newval & 0xff) == 0x02)
|
|
PixelEngine::SetFinish();
|
|
break;
|
|
case BPMEM_PE_TOKEN_ID:
|
|
PixelEngine::SetToken(newval & 0xffff, false);
|
|
break;
|
|
case BPMEM_PE_TOKEN_INT_ID: // Pixel Engine Interrupt Token ID
|
|
PixelEngine::SetToken(newval & 0xffff, true);
|
|
break;
|
|
}
|
|
}
|
|
|
|
void GetBPRegInfo(const u8* data, std::string* name, std::string* desc)
|
|
{
|
|
const char* no_yes[2] = {"No", "Yes"};
|
|
|
|
u8 cmd = data[0];
|
|
u32 cmddata = Common::swap32(data) & 0xFFFFFF;
|
|
switch (cmd)
|
|
{
|
|
// Macro to set the register name and make sure it was written correctly via compile time assertion
|
|
#define SetRegName(reg) \
|
|
*name = #reg; \
|
|
(void)(reg);
|
|
|
|
case BPMEM_GENMODE: // 0x00
|
|
SetRegName(BPMEM_GENMODE);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_DISPLAYCOPYFILTER: // 0x01
|
|
// TODO: This is actually the sample pattern used for copies from an antialiased EFB
|
|
SetRegName(BPMEM_DISPLAYCOPYFILTER);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case 0x02: // 0x02
|
|
case 0x03: // 0x03
|
|
case 0x04: // 0x04
|
|
// TODO: same as BPMEM_DISPLAYCOPYFILTER
|
|
break;
|
|
|
|
case BPMEM_IND_MTXA: // 0x06
|
|
case BPMEM_IND_MTXA + 3:
|
|
case BPMEM_IND_MTXA + 6:
|
|
SetRegName(BPMEM_IND_MTXA);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_IND_MTXB: // 0x07
|
|
case BPMEM_IND_MTXB + 3:
|
|
case BPMEM_IND_MTXB + 6:
|
|
SetRegName(BPMEM_IND_MTXB);
|
|
// TODO: Descriptio
|
|
break;
|
|
|
|
case BPMEM_IND_MTXC: // 0x08
|
|
case BPMEM_IND_MTXC + 3:
|
|
case BPMEM_IND_MTXC + 6:
|
|
SetRegName(BPMEM_IND_MTXC);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_IND_IMASK: // 0x0F
|
|
SetRegName(BPMEM_IND_IMASK);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_IND_CMD: // 0x10
|
|
case BPMEM_IND_CMD + 1:
|
|
case BPMEM_IND_CMD + 2:
|
|
case BPMEM_IND_CMD + 3:
|
|
case BPMEM_IND_CMD + 4:
|
|
case BPMEM_IND_CMD + 5:
|
|
case BPMEM_IND_CMD + 6:
|
|
case BPMEM_IND_CMD + 7:
|
|
case BPMEM_IND_CMD + 8:
|
|
case BPMEM_IND_CMD + 9:
|
|
case BPMEM_IND_CMD + 10:
|
|
case BPMEM_IND_CMD + 11:
|
|
case BPMEM_IND_CMD + 12:
|
|
case BPMEM_IND_CMD + 13:
|
|
case BPMEM_IND_CMD + 14:
|
|
case BPMEM_IND_CMD + 15:
|
|
SetRegName(BPMEM_IND_CMD);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_SCISSORTL: // 0x20
|
|
SetRegName(BPMEM_SCISSORTL);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_SCISSORBR: // 0x21
|
|
SetRegName(BPMEM_SCISSORBR);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_LINEPTWIDTH: // 0x22
|
|
SetRegName(BPMEM_LINEPTWIDTH);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_PERF0_TRI: // 0x23
|
|
SetRegName(BPMEM_PERF0_TRI);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_PERF0_QUAD: // 0x24
|
|
SetRegName(BPMEM_PERF0_QUAD);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_RAS1_SS0: // 0x25
|
|
SetRegName(BPMEM_RAS1_SS0);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_RAS1_SS1: // 0x26
|
|
SetRegName(BPMEM_RAS1_SS1);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_IREF: // 0x27
|
|
SetRegName(BPMEM_IREF);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_TREF: // 0x28
|
|
case BPMEM_TREF + 1:
|
|
case BPMEM_TREF + 2:
|
|
case BPMEM_TREF + 3:
|
|
case BPMEM_TREF + 4:
|
|
case BPMEM_TREF + 5:
|
|
case BPMEM_TREF + 6:
|
|
case BPMEM_TREF + 7:
|
|
SetRegName(BPMEM_TREF);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_SU_SSIZE: // 0x30
|
|
case BPMEM_SU_SSIZE + 2:
|
|
case BPMEM_SU_SSIZE + 4:
|
|
case BPMEM_SU_SSIZE + 6:
|
|
case BPMEM_SU_SSIZE + 8:
|
|
case BPMEM_SU_SSIZE + 10:
|
|
case BPMEM_SU_SSIZE + 12:
|
|
case BPMEM_SU_SSIZE + 14:
|
|
SetRegName(BPMEM_SU_SSIZE);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_SU_TSIZE: // 0x31
|
|
case BPMEM_SU_TSIZE + 2:
|
|
case BPMEM_SU_TSIZE + 4:
|
|
case BPMEM_SU_TSIZE + 6:
|
|
case BPMEM_SU_TSIZE + 8:
|
|
case BPMEM_SU_TSIZE + 10:
|
|
case BPMEM_SU_TSIZE + 12:
|
|
case BPMEM_SU_TSIZE + 14:
|
|
SetRegName(BPMEM_SU_TSIZE);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_ZMODE: // 0x40
|
|
SetRegName(BPMEM_ZMODE);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_BLENDMODE: // 0x41
|
|
{
|
|
SetRegName(BPMEM_BLENDMODE);
|
|
BlendMode mode;
|
|
mode.hex = cmddata;
|
|
const char* dstfactors[] = {"0", "1", "src_color", "1-src_color",
|
|
"src_alpha", "1-src_alpha", "dst_alpha", "1-dst_alpha"};
|
|
const char* srcfactors[] = {"0", "1", "dst_color", "1-dst_color",
|
|
"src_alpha", "1-src_alpha", "dst_alpha", "1-dst_alpha"};
|
|
const char* logicmodes[] = {"0", "s & d", "s & ~d", "s", "~s & d", "d",
|
|
"s ^ d", "s | d", "~(s | d)", "~(s ^ d)", "~d", "s | ~d",
|
|
"~s", "~s | d", "~(s & d)", "1"};
|
|
*desc =
|
|
fmt::format("Enable: {}\n"
|
|
"Logic ops: {}\n"
|
|
"Dither: {}\n"
|
|
"Color write: {}\n"
|
|
"Alpha write: {}\n"
|
|
"Dest factor: {}\n"
|
|
"Source factor: {}\n"
|
|
"Subtract: {}\n"
|
|
"Logic mode: {}\n",
|
|
no_yes[mode.blendenable], no_yes[mode.logicopenable], no_yes[mode.dither],
|
|
no_yes[mode.colorupdate], no_yes[mode.alphaupdate], dstfactors[mode.dstfactor],
|
|
srcfactors[mode.srcfactor], no_yes[mode.subtract], logicmodes[mode.logicmode]);
|
|
}
|
|
break;
|
|
|
|
case BPMEM_CONSTANTALPHA: // 0x42
|
|
SetRegName(BPMEM_CONSTANTALPHA);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_ZCOMPARE: // 0x43
|
|
{
|
|
SetRegName(BPMEM_ZCOMPARE);
|
|
PEControl config;
|
|
config.hex = cmddata;
|
|
const char* pixel_formats[] = {"RGB8_Z24", "RGBA6_Z24", "RGB565_Z16", "Z24",
|
|
"Y8", "U8", "V8", "YUV420"};
|
|
const char* zformats[] = {
|
|
"linear", "compressed (near)", "compressed (mid)", "compressed (far)",
|
|
"inv linear", "compressed (inv near)", "compressed (inv mid)", "compressed (inv far)"};
|
|
*desc = fmt::format("EFB pixel format: {}\n"
|
|
"Depth format: {}\n"
|
|
"Early depth test: {}\n",
|
|
pixel_formats[config.pixel_format], zformats[config.zformat],
|
|
no_yes[config.early_ztest]);
|
|
}
|
|
break;
|
|
|
|
case BPMEM_FIELDMASK: // 0x44
|
|
SetRegName(BPMEM_FIELDMASK);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_SETDRAWDONE: // 0x45
|
|
SetRegName(BPMEM_SETDRAWDONE);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_BUSCLOCK0: // 0x46
|
|
SetRegName(BPMEM_BUSCLOCK0);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_PE_TOKEN_ID: // 0x47
|
|
SetRegName(BPMEM_PE_TOKEN_ID);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_PE_TOKEN_INT_ID: // 0x48
|
|
SetRegName(BPMEM_PE_TOKEN_INT_ID);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_EFB_TL: // 0x49
|
|
{
|
|
SetRegName(BPMEM_EFB_TL);
|
|
X10Y10 left_top;
|
|
left_top.hex = cmddata;
|
|
*desc = fmt::format("Left: {}\nTop: {}", left_top.x, left_top.y);
|
|
}
|
|
break;
|
|
|
|
case BPMEM_EFB_BR: // 0x4A
|
|
{
|
|
// TODO: Misleading name, should be BPMEM_EFB_WH instead
|
|
SetRegName(BPMEM_EFB_BR);
|
|
X10Y10 width_height;
|
|
width_height.hex = cmddata;
|
|
*desc = fmt::format("Width: {}\nHeight: {}", width_height.x + 1, width_height.y + 1);
|
|
}
|
|
break;
|
|
|
|
case BPMEM_EFB_ADDR: // 0x4B
|
|
SetRegName(BPMEM_EFB_ADDR);
|
|
*desc = fmt::format("Target address (32 byte aligned): 0x{:06X}", cmddata << 5);
|
|
break;
|
|
|
|
case BPMEM_MIPMAP_STRIDE: // 0x4D
|
|
SetRegName(BPMEM_MIPMAP_STRIDE);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_COPYYSCALE: // 0x4E
|
|
SetRegName(BPMEM_COPYYSCALE);
|
|
*desc = fmt::format("Scaling factor (XFB copy only): 0x{:X} ({} or inverted {})", cmddata,
|
|
static_cast<float>(cmddata) / 256.f, 256.f / static_cast<float>(cmddata));
|
|
break;
|
|
|
|
case BPMEM_CLEAR_AR: // 0x4F
|
|
SetRegName(BPMEM_CLEAR_AR);
|
|
*desc = fmt::format("Alpha: 0x{:02X}\nRed: 0x{:02X}", (cmddata & 0xFF00) >> 8, cmddata & 0xFF);
|
|
break;
|
|
|
|
case BPMEM_CLEAR_GB: // 0x50
|
|
SetRegName(BPMEM_CLEAR_GB);
|
|
*desc = fmt::format("Green: 0x{:02X}\nBlue: 0x{:02X}", (cmddata & 0xFF00) >> 8, cmddata & 0xFF);
|
|
break;
|
|
|
|
case BPMEM_CLEAR_Z: // 0x51
|
|
SetRegName(BPMEM_CLEAR_Z);
|
|
*desc = fmt::format("Z value: 0x{:06X}", cmddata);
|
|
break;
|
|
|
|
case BPMEM_TRIGGER_EFB_COPY: // 0x52
|
|
{
|
|
SetRegName(BPMEM_TRIGGER_EFB_COPY);
|
|
UPE_Copy copy;
|
|
copy.Hex = cmddata;
|
|
*desc = fmt::format(
|
|
"Clamping: {}\n"
|
|
"Converting from RGB to YUV: {}\n"
|
|
"Target pixel format: 0x{:X}\n"
|
|
"Gamma correction: {}\n"
|
|
"Mipmap filter: {}\n"
|
|
"Vertical scaling: {}\n"
|
|
"Clear: {}\n"
|
|
"Frame to field: 0x{:01X}\n"
|
|
"Copy to XFB: {}\n"
|
|
"Intensity format: {}\n"
|
|
"Automatic color conversion: {}",
|
|
(copy.clamp_top && copy.clamp_bottom) ?
|
|
"Top and Bottom" :
|
|
(copy.clamp_top) ? "Top only" : (copy.clamp_bottom) ? "Bottom only" : "None",
|
|
no_yes[copy.yuv], static_cast<int>(copy.tp_realFormat()),
|
|
(copy.gamma == 0) ?
|
|
"1.0" :
|
|
(copy.gamma == 1) ? "1.7" : (copy.gamma == 2) ? "2.2" : "Invalid value 0x3?",
|
|
no_yes[copy.half_scale], no_yes[copy.scale_invert], no_yes[copy.clear],
|
|
static_cast<u32>(copy.frame_to_field), no_yes[copy.copy_to_xfb], no_yes[copy.intensity_fmt],
|
|
no_yes[copy.auto_conv]);
|
|
}
|
|
break;
|
|
|
|
case BPMEM_COPYFILTER0: // 0x53
|
|
SetRegName(BPMEM_COPYFILTER0);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_COPYFILTER1: // 0x54
|
|
SetRegName(BPMEM_COPYFILTER1);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_CLEARBBOX1: // 0x55
|
|
SetRegName(BPMEM_CLEARBBOX1);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_CLEARBBOX2: // 0x56
|
|
SetRegName(BPMEM_CLEARBBOX2);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_CLEAR_PIXEL_PERF: // 0x57
|
|
SetRegName(BPMEM_CLEAR_PIXEL_PERF);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_REVBITS: // 0x58
|
|
SetRegName(BPMEM_REVBITS);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_SCISSOROFFSET: // 0x59
|
|
SetRegName(BPMEM_SCISSOROFFSET);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_PRELOAD_ADDR: // 0x60
|
|
SetRegName(BPMEM_PRELOAD_ADDR);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_PRELOAD_TMEMEVEN: // 0x61
|
|
SetRegName(BPMEM_PRELOAD_TMEMEVEN);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_PRELOAD_TMEMODD: // 0x62
|
|
SetRegName(BPMEM_PRELOAD_TMEMODD);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_PRELOAD_MODE: // 0x63
|
|
SetRegName(BPMEM_PRELOAD_MODE);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_LOADTLUT0: // 0x64
|
|
SetRegName(BPMEM_LOADTLUT0);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_LOADTLUT1: // 0x65
|
|
SetRegName(BPMEM_LOADTLUT1);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_TEXINVALIDATE: // 0x66
|
|
SetRegName(BPMEM_TEXINVALIDATE);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_PERF1: // 0x67
|
|
SetRegName(BPMEM_PERF1);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_FIELDMODE: // 0x68
|
|
SetRegName(BPMEM_FIELDMODE);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_BUSCLOCK1: // 0x69
|
|
SetRegName(BPMEM_BUSCLOCK1);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_TX_SETMODE0: // 0x80
|
|
case BPMEM_TX_SETMODE0 + 1:
|
|
case BPMEM_TX_SETMODE0 + 2:
|
|
case BPMEM_TX_SETMODE0 + 3:
|
|
SetRegName(BPMEM_TX_SETMODE0);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_TX_SETMODE1: // 0x84
|
|
case BPMEM_TX_SETMODE1 + 1:
|
|
case BPMEM_TX_SETMODE1 + 2:
|
|
case BPMEM_TX_SETMODE1 + 3:
|
|
SetRegName(BPMEM_TX_SETMODE1);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_TX_SETIMAGE0: // 0x88
|
|
case BPMEM_TX_SETIMAGE0 + 1:
|
|
case BPMEM_TX_SETIMAGE0 + 2:
|
|
case BPMEM_TX_SETIMAGE0 + 3:
|
|
case BPMEM_TX_SETIMAGE0_4: // 0xA8
|
|
case BPMEM_TX_SETIMAGE0_4 + 1:
|
|
case BPMEM_TX_SETIMAGE0_4 + 2:
|
|
case BPMEM_TX_SETIMAGE0_4 + 3:
|
|
{
|
|
SetRegName(BPMEM_TX_SETIMAGE0);
|
|
int texnum =
|
|
(cmd < BPMEM_TX_SETIMAGE0_4) ? cmd - BPMEM_TX_SETIMAGE0 : cmd - BPMEM_TX_SETIMAGE0_4 + 4;
|
|
TexImage0 teximg;
|
|
teximg.hex = cmddata;
|
|
*desc = fmt::format("Texture Unit: {}\n"
|
|
"Width: {}\n"
|
|
"Height: {}\n"
|
|
"Format: {:x}\n",
|
|
texnum, teximg.width + 1, teximg.height + 1, teximg.format);
|
|
}
|
|
break;
|
|
|
|
case BPMEM_TX_SETIMAGE1: // 0x8C
|
|
case BPMEM_TX_SETIMAGE1 + 1:
|
|
case BPMEM_TX_SETIMAGE1 + 2:
|
|
case BPMEM_TX_SETIMAGE1 + 3:
|
|
case BPMEM_TX_SETIMAGE1_4: // 0xAC
|
|
case BPMEM_TX_SETIMAGE1_4 + 1:
|
|
case BPMEM_TX_SETIMAGE1_4 + 2:
|
|
case BPMEM_TX_SETIMAGE1_4 + 3:
|
|
{
|
|
SetRegName(BPMEM_TX_SETIMAGE1);
|
|
int texnum =
|
|
(cmd < BPMEM_TX_SETIMAGE1_4) ? cmd - BPMEM_TX_SETIMAGE1 : cmd - BPMEM_TX_SETIMAGE1_4 + 4;
|
|
TexImage1 teximg;
|
|
teximg.hex = cmddata;
|
|
*desc = fmt::format("Texture Unit: {}\n"
|
|
"Even TMEM Offset: {:x}\n"
|
|
"Even TMEM Width: {}\n"
|
|
"Even TMEM Height: {}\n"
|
|
"Cache is manually managed: {}\n",
|
|
texnum, teximg.tmem_even, teximg.cache_width, teximg.cache_height,
|
|
no_yes[teximg.image_type]);
|
|
}
|
|
break;
|
|
|
|
case BPMEM_TX_SETIMAGE2: // 0x90
|
|
case BPMEM_TX_SETIMAGE2 + 1:
|
|
case BPMEM_TX_SETIMAGE2 + 2:
|
|
case BPMEM_TX_SETIMAGE2 + 3:
|
|
case BPMEM_TX_SETIMAGE2_4: // 0xB0
|
|
case BPMEM_TX_SETIMAGE2_4 + 1:
|
|
case BPMEM_TX_SETIMAGE2_4 + 2:
|
|
case BPMEM_TX_SETIMAGE2_4 + 3:
|
|
{
|
|
SetRegName(BPMEM_TX_SETIMAGE2);
|
|
int texnum =
|
|
(cmd < BPMEM_TX_SETIMAGE2_4) ? cmd - BPMEM_TX_SETIMAGE2 : cmd - BPMEM_TX_SETIMAGE2_4 + 4;
|
|
TexImage2 teximg;
|
|
teximg.hex = cmddata;
|
|
*desc = fmt::format("Texture Unit: {}\n"
|
|
"Odd TMEM Offset: {:x}\n"
|
|
"Odd TMEM Width: {}\n"
|
|
"Odd TMEM Height: {}\n",
|
|
texnum, teximg.tmem_odd, teximg.cache_width, teximg.cache_height);
|
|
}
|
|
break;
|
|
|
|
case BPMEM_TX_SETIMAGE3: // 0x94
|
|
case BPMEM_TX_SETIMAGE3 + 1:
|
|
case BPMEM_TX_SETIMAGE3 + 2:
|
|
case BPMEM_TX_SETIMAGE3 + 3:
|
|
case BPMEM_TX_SETIMAGE3_4: // 0xB4
|
|
case BPMEM_TX_SETIMAGE3_4 + 1:
|
|
case BPMEM_TX_SETIMAGE3_4 + 2:
|
|
case BPMEM_TX_SETIMAGE3_4 + 3:
|
|
{
|
|
SetRegName(BPMEM_TX_SETIMAGE3);
|
|
int texnum =
|
|
(cmd < BPMEM_TX_SETIMAGE3_4) ? cmd - BPMEM_TX_SETIMAGE3 : cmd - BPMEM_TX_SETIMAGE3_4 + 4;
|
|
TexImage3 teximg;
|
|
teximg.hex = cmddata;
|
|
*desc = fmt::format("Texture {} source address (32 byte aligned): 0x{:06X}", texnum,
|
|
teximg.image_base << 5);
|
|
}
|
|
break;
|
|
|
|
case BPMEM_TX_SETTLUT: // 0x98
|
|
case BPMEM_TX_SETTLUT + 1:
|
|
case BPMEM_TX_SETTLUT + 2:
|
|
case BPMEM_TX_SETTLUT + 3:
|
|
case BPMEM_TX_SETTLUT_4: // 0xB8
|
|
case BPMEM_TX_SETTLUT_4 + 1:
|
|
case BPMEM_TX_SETTLUT_4 + 2:
|
|
case BPMEM_TX_SETTLUT_4 + 3:
|
|
SetRegName(BPMEM_TX_SETTLUT);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_TEV_COLOR_ENV: // 0xC0
|
|
case BPMEM_TEV_COLOR_ENV + 2:
|
|
case BPMEM_TEV_COLOR_ENV + 4:
|
|
case BPMEM_TEV_COLOR_ENV + 8:
|
|
case BPMEM_TEV_COLOR_ENV + 10:
|
|
case BPMEM_TEV_COLOR_ENV + 12:
|
|
case BPMEM_TEV_COLOR_ENV + 14:
|
|
case BPMEM_TEV_COLOR_ENV + 16:
|
|
case BPMEM_TEV_COLOR_ENV + 18:
|
|
case BPMEM_TEV_COLOR_ENV + 20:
|
|
case BPMEM_TEV_COLOR_ENV + 22:
|
|
case BPMEM_TEV_COLOR_ENV + 24:
|
|
case BPMEM_TEV_COLOR_ENV + 26:
|
|
case BPMEM_TEV_COLOR_ENV + 28:
|
|
case BPMEM_TEV_COLOR_ENV + 30:
|
|
{
|
|
SetRegName(BPMEM_TEV_COLOR_ENV);
|
|
TevStageCombiner::ColorCombiner cc;
|
|
cc.hex = cmddata;
|
|
const char* tevin[] = {
|
|
"prev.rgb", "prev.aaa", "c0.rgb", "c0.aaa", "c1.rgb", "c1.aaa", "c2.rgb", "c2.aaa",
|
|
"tex.rgb", "tex.aaa", "ras.rgb", "ras.aaa", "ONE", "HALF", "konst.rgb", "ZERO",
|
|
};
|
|
const char* tevbias[] = {"0", "+0.5", "-0.5", "compare"};
|
|
const char* tevop[] = {"add", "sub"};
|
|
const char* tevscale[] = {"1", "2", "4", "0.5"};
|
|
const char* tevout[] = {"prev.rgb", "c0.rgb", "c1.rgb", "c2.rgb"};
|
|
*desc = fmt::format("Tev stage: {}\n"
|
|
"a: {}\n"
|
|
"b: {}\n"
|
|
"c: {}\n"
|
|
"d: {}\n"
|
|
"Bias: {}\n"
|
|
"Op: {}\n"
|
|
"Clamp: {}\n"
|
|
"Scale factor: {}\n"
|
|
"Dest: {}\n",
|
|
(data[0] - BPMEM_TEV_COLOR_ENV) / 2, tevin[cc.a], tevin[cc.b], tevin[cc.c],
|
|
tevin[cc.d], tevbias[cc.bias], tevop[cc.op], no_yes[cc.clamp],
|
|
tevscale[cc.shift], tevout[cc.dest]);
|
|
break;
|
|
}
|
|
|
|
case BPMEM_TEV_ALPHA_ENV: // 0xC1
|
|
case BPMEM_TEV_ALPHA_ENV + 2:
|
|
case BPMEM_TEV_ALPHA_ENV + 4:
|
|
case BPMEM_TEV_ALPHA_ENV + 6:
|
|
case BPMEM_TEV_ALPHA_ENV + 8:
|
|
case BPMEM_TEV_ALPHA_ENV + 10:
|
|
case BPMEM_TEV_ALPHA_ENV + 12:
|
|
case BPMEM_TEV_ALPHA_ENV + 14:
|
|
case BPMEM_TEV_ALPHA_ENV + 16:
|
|
case BPMEM_TEV_ALPHA_ENV + 18:
|
|
case BPMEM_TEV_ALPHA_ENV + 20:
|
|
case BPMEM_TEV_ALPHA_ENV + 22:
|
|
case BPMEM_TEV_ALPHA_ENV + 24:
|
|
case BPMEM_TEV_ALPHA_ENV + 26:
|
|
case BPMEM_TEV_ALPHA_ENV + 28:
|
|
case BPMEM_TEV_ALPHA_ENV + 30:
|
|
{
|
|
SetRegName(BPMEM_TEV_ALPHA_ENV);
|
|
TevStageCombiner::AlphaCombiner ac;
|
|
ac.hex = cmddata;
|
|
const char* tevin[] = {
|
|
"prev", "c0", "c1", "c2", "tex", "ras", "konst", "ZERO",
|
|
};
|
|
const char* tevbias[] = {"0", "+0.5", "-0.5", "compare"};
|
|
const char* tevop[] = {"add", "sub"};
|
|
const char* tevscale[] = {"1", "2", "4", "0.5"};
|
|
const char* tevout[] = {"prev", "c0", "c1", "c2"};
|
|
*desc = fmt::format("Tev stage: {}\n"
|
|
"a: {}\n"
|
|
"b: {}\n"
|
|
"c: {}\n"
|
|
"d: {}\n"
|
|
"Bias: {}\n"
|
|
"Op: {}\n"
|
|
"Clamp: {}\n"
|
|
"Scale factor: {}\n"
|
|
"Dest: {}\n"
|
|
"Ras sel: {}\n"
|
|
"Tex sel: {}\n",
|
|
(data[0] - BPMEM_TEV_ALPHA_ENV) / 2, tevin[ac.a], tevin[ac.b], tevin[ac.c],
|
|
tevin[ac.d], tevbias[ac.bias], tevop[ac.op], no_yes[ac.clamp],
|
|
tevscale[ac.shift], tevout[ac.dest], ac.rswap.Value(), ac.tswap.Value());
|
|
break;
|
|
}
|
|
|
|
case BPMEM_TEV_COLOR_RA: // 0xE0
|
|
case BPMEM_TEV_COLOR_RA + 2: // 0xE2
|
|
case BPMEM_TEV_COLOR_RA + 4: // 0xE4
|
|
case BPMEM_TEV_COLOR_RA + 6: // 0xE6
|
|
SetRegName(BPMEM_TEV_COLOR_RA);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_TEV_COLOR_BG: // 0xE1
|
|
case BPMEM_TEV_COLOR_BG + 2: // 0xE3
|
|
case BPMEM_TEV_COLOR_BG + 4: // 0xE5
|
|
case BPMEM_TEV_COLOR_BG + 6: // 0xE7
|
|
SetRegName(BPMEM_TEV_COLOR_BG);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_FOGRANGE: // 0xE8
|
|
case BPMEM_FOGRANGE + 1:
|
|
case BPMEM_FOGRANGE + 2:
|
|
case BPMEM_FOGRANGE + 3:
|
|
case BPMEM_FOGRANGE + 4:
|
|
case BPMEM_FOGRANGE + 5:
|
|
SetRegName(BPMEM_FOGRANGE);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_FOGPARAM0: // 0xEE
|
|
SetRegName(BPMEM_FOGPARAM0);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_FOGBMAGNITUDE: // 0xEF
|
|
SetRegName(BPMEM_FOGBMAGNITUDE);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_FOGBEXPONENT: // 0xF0
|
|
SetRegName(BPMEM_FOGBEXPONENT);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_FOGPARAM3: // 0xF1
|
|
SetRegName(BPMEM_FOGPARAM3);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_FOGCOLOR: // 0xF2
|
|
SetRegName(BPMEM_FOGCOLOR);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_ALPHACOMPARE: // 0xF3
|
|
{
|
|
SetRegName(BPMEM_ALPHACOMPARE);
|
|
AlphaTest test;
|
|
test.hex = cmddata;
|
|
const char* functions[] = {"NEVER", "LESS", "EQUAL", "LEQUAL",
|
|
"GREATER", "NEQUAL", "GEQUAL", "ALWAYS"};
|
|
const char* logic[] = {"AND", "OR", "XOR", "XNOR"};
|
|
*desc = fmt::format("Test 1: {} (ref: 0x{:02x})\n"
|
|
"Test 2: {} (ref: 0x{:02x})\n"
|
|
"Logic: {}\n",
|
|
functions[test.comp0], test.ref0.Value(), functions[test.comp1],
|
|
test.ref1.Value(), logic[test.logic]);
|
|
break;
|
|
}
|
|
|
|
case BPMEM_BIAS: // 0xF4
|
|
SetRegName(BPMEM_BIAS);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_ZTEX2: // 0xF5
|
|
SetRegName(BPMEM_ZTEX2);
|
|
// TODO: Description
|
|
break;
|
|
|
|
case BPMEM_TEV_KSEL: // 0xF6
|
|
case BPMEM_TEV_KSEL + 1:
|
|
case BPMEM_TEV_KSEL + 2:
|
|
case BPMEM_TEV_KSEL + 3:
|
|
case BPMEM_TEV_KSEL + 4:
|
|
case BPMEM_TEV_KSEL + 5:
|
|
case BPMEM_TEV_KSEL + 6:
|
|
case BPMEM_TEV_KSEL + 7:
|
|
SetRegName(BPMEM_TEV_KSEL);
|
|
// TODO: Description
|
|
break;
|
|
|
|
#undef SetRegName
|
|
}
|
|
}
|
|
|
|
// Called when loading a saved state.
|
|
void BPReload()
|
|
{
|
|
// restore anything that goes straight to the renderer.
|
|
// let's not risk actually replaying any writes.
|
|
// note that PixelShaderManager is already covered since it has its own DoState.
|
|
SetGenerationMode();
|
|
SetScissor();
|
|
SetViewport();
|
|
SetDepthMode();
|
|
SetBlendMode();
|
|
OnPixelFormatChange();
|
|
}
|