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Remove the last ConfigEntry state (#1902)

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* Get rid of `ConfigEntry::ExternalBIOSEnable`

- Now the BIOS files themselves are checked
- The frontend's `Config::ExternalBIOSEnable` is not affected

* Add `JITArgs`

* Pass the JIT status to the `ARM` constructors

* Encapsulate `NDS::EnableJIT`

* Pass `JITArgs` to `ARMJIT`'s constructor

* Remove the `JIT_*` `ConfigEntry`s in favor of members

- Allow all the JIT args to be set with `NDS::SetJITArgs`
- Encapsulate the JIT-related parameters in `ARMJIT` so they can reset the block cache if changed
- Update the active (or newly-created) console in the frontend with adjusted JIT args

* Make audio bit depth and interpolation configurable in `NDSArgs`

- Define enums for both
- Give those settings default values in `NDSArgs`
- Remove `ConfigEntry::AudioBitDepth`
- Initialize these settings in the relevant SPU constructors

* Move the last DSi-specific logic in `Reset` to its own subclass

* Remove `ConfigEntry::DSi_FullBIOSBoot`

- Add members to `DSi` instead for getting and setting this
- Update the frontend to accommodate these changes

* Oops, missed a spot

* Remove `ConfigEntry::Firm_MAC` and `Platform::GetConfigArray`

- Also move the MAC parsing code to `ROMManager`

* Remove the last `ConfigEntry` state

- Make GDB support configurable via members

* Add some `#ifdef`s that I'd almost forgotten
This commit is contained in:
Jesse Talavera
2023-12-05 10:47:16 -05:00
committed by GitHub
parent ae91d89f7c
commit 090627b3c1
20 changed files with 323 additions and 230 deletions
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10
src/ARMJIT_x64/ARMJIT_LoadStore.cpp
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@ -119,7 +119,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
if (size == 16)
addressMask = ~1;
if (NDS.JIT.LiteralOptimizations && rn == 15 && rd != 15 && op2.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
if (NDS.JIT.LiteralOptimizationsEnabled() && rn == 15 && rd != 15 && op2.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
{
u32 addr = R15 + op2.Imm * ((flags & memop_SubtractOffset) ? -1 : 1);
@ -136,7 +136,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
Comp_AddCycles_CDI();
}
bool addrIsStatic = NDS.JIT.LiteralOptimizations
bool addrIsStatic = NDS.JIT.LiteralOptimizationsEnabled()
&& RegCache.IsLiteral(rn) && op2.IsImm && !(flags & (memop_Writeback|memop_Post));
u32 staticAddress;
if (addrIsStatic)
@ -200,7 +200,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
? NDS.JIT.Memory.ClassifyAddress9(CurInstr.DataRegion)
: NDS.JIT.Memory.ClassifyAddress7(CurInstr.DataRegion);
if (NDS.JIT.FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || NDS.JIT.Memory.IsFastmemCompatible(expectedTarget)))
if (NDS.JIT.FastMemoryEnabled() && ((!Thumb && CurInstr.Cond() != 0xE) || NDS.JIT.Memory.IsFastmemCompatible(expectedTarget)))
{
if (rdMapped.IsImm())
{
@ -431,7 +431,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
else
Comp_AddCycles_CD();
bool compileFastPath = NDS.JIT.FastMemory
bool compileFastPath = NDS.JIT.FastMemoryEnabled()
&& !usermode && (CurInstr.Cond() < 0xE || NDS.JIT.Memory.IsFastmemCompatible(expectedTarget));
// we need to make sure that the stack stays aligned to 16 bytes
@ -809,7 +809,7 @@ void Compiler::T_Comp_LoadPCRel()
{
u32 offset = (CurInstr.Instr & 0xFF) << 2;
u32 addr = (R15 & ~0x2) + offset;
if (!NDS.JIT.LiteralOptimizations || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
if (!NDS.JIT.LiteralOptimizationsEnabled() || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
Comp_MemAccess(CurInstr.T_Reg(8), 15, Op2(offset), 32, 0);
}