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rewrite JIT memory emulation

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This commit is contained in:
RSDuck
2020-05-09 00:45:05 +02:00
parent bcc4b5c8dd
commit 0f53a34551
14 changed files with 1494 additions and 843 deletions
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68
src/ARMJIT_Internal.h
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@ -152,30 +152,34 @@ struct __attribute__((packed)) TinyVector
class JitBlock
{
public:
JitBlock(u32 numInstrs, u32 numAddresses)
JitBlock(u32 num, u32 literalHash, u32 numAddresses, u32 numLiterals)
{
NumInstrs = numInstrs;
Num = num;
NumAddresses = numAddresses;
Data.SetLength(numInstrs + numAddresses);
NumLiterals = numLiterals;
Data.SetLength(numAddresses * 2 + numLiterals);
}
u32 StartAddr;
u32 PseudoPhysicalAddr;
u32 NumInstrs;
u32 NumAddresses;
u32 InstrHash, LiteralHash;
u8 Num;
u16 NumAddresses;
u16 NumLiterals;
JitBlockEntry EntryPoint;
u32* Instrs()
{ return &Data[0]; }
u32* AddressRanges()
{ return &Data[NumInstrs]; }
{ return &Data[0]; }
u32* AddressMasks()
{ return &Data[NumAddresses]; }
u32* Literals()
{ return &Data[NumAddresses * 2]; }
u32* Links()
{ return &Data[NumInstrs + NumAddresses]; }
{ return &Data[NumAddresses * 2 + NumLiterals]; }
u32 NumLinks()
{ return Data.Length - NumInstrs - NumAddresses; }
{ return Data.Length - NumAddresses * 2 - NumLiterals; }
void AddLink(u32 link)
{
@ -184,7 +188,7 @@ public:
void ResetLinks()
{
Data.SetLength(NumInstrs + NumAddresses);
Data.SetLength(NumAddresses * 2 + NumLiterals);
}
private:
@ -200,8 +204,7 @@ private:
struct __attribute__((packed)) AddressRange
{
TinyVector<JitBlock*> Blocks;
u16 InvalidLiterals;
u16 TimesInvalidated;
u32 Code;
};
extern AddressRange CodeRanges[ExeMemSpaceSize / 512];
@ -210,14 +213,45 @@ typedef void (*InterpreterFunc)(ARM* cpu);
extern InterpreterFunc InterpretARM[];
extern InterpreterFunc InterpretTHUMB[];
extern u8 MemRegion9[0x80000];
extern u8 MemRegion7[0x80000];
extern u8 MemoryStatus9[0x800000];
extern u8 MemoryStatus7[0x800000];
extern TinyVector<u32> InvalidLiterals;
void* GetFuncForAddr(ARM* cpu, u32 addr, bool store, int size);
template <u32 Num>
void LinkBlock(ARM* cpu, u32 codeOffset);
enum
{
memregion_Other = 0,
memregion_ITCM,
memregion_DTCM,
memregion_BIOS9,
memregion_MainRAM,
memregion_SWRAM9,
memregion_SWRAM7,
memregion_IO9,
memregion_VRAM,
memregion_BIOS7,
memregion_WRAM7,
memregion_IO7,
memregion_Wifi,
memregion_VWRAM,
};
int ClassifyAddress9(u32 addr);
int ClassifyAddress7(u32 addr);
template <typename T> T SlowRead9(ARMv5* cpu, u32 addr);
template <typename T> void SlowWrite9(ARMv5* cpu, u32 addr, T val);
template <typename T> T SlowRead7(u32 addr);
template <typename T> void SlowWrite7(u32 addr, T val);
template <bool PreInc, bool Write> void SlowBlockTransfer9(u32 addr, u64* data, u32 num, ARMv5* cpu);
template <bool PreInc, bool Write> void SlowBlockTransfer7(u32 addr, u64* data, u32 num);
}
#endif