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rewrite JIT memory emulation

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This commit is contained in:
RSDuck
2020-05-09 00:45:05 +02:00
parent bcc4b5c8dd
commit 0f53a34551
14 changed files with 1494 additions and 843 deletions
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105
src/NDS.cpp
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@ -535,10 +535,6 @@ void Reset()
KeyCnt = 0;
RCnt = 0;
#ifdef JIT_ENABLED
ARMJIT::ResetBlockCache();
#endif
NDSCart::Reset();
GBACart::Reset();
GPU::Reset();
@ -548,6 +544,10 @@ void Reset()
Wifi::Reset();
AREngine::Reset();
#ifdef JIT_ENABLED
ARMJIT::Reset();
#endif
}
void Stop()
@ -1058,6 +1058,9 @@ void Halt()
void MapSharedWRAM(u8 val)
{
if (val == WRAMCnt)
return;
WRAMCnt = val;
switch (WRAMCnt & 0x3)
@ -1090,6 +1093,11 @@ void MapSharedWRAM(u8 val)
SWRAM_ARM7Mask = 0x7FFF;
break;
}
#ifdef JIT_ENABLED
ARMJIT::UpdateMemoryStatus9(0x3000000, 0x3000000 + 0x1000000);
ARMJIT::UpdateMemoryStatus7(0x3000000, 0x3000000 + 0x1000000);
#endif
}
@ -1873,12 +1881,18 @@ void ARM9Write8(u32 addr, u8 val)
switch (addr & 0xFF000000)
{
case 0x02000000:
#ifdef JIT_ENABLED
ARMJIT::InvalidateMainRAMIfNecessary(addr);
#endif
*(u8*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
return;
case 0x03000000:
if (SWRAM_ARM9)
{
#ifdef JIT_ENABLED
ARMJIT::InvalidateSWRAM9IfNecessary(addr);
#endif
*(u8*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask] = val;
}
return;
@ -1923,12 +1937,18 @@ void ARM9Write16(u32 addr, u16 val)
switch (addr & 0xFF000000)
{
case 0x02000000:
#ifdef JIT_ENABLED
ARMJIT::InvalidateMainRAMIfNecessary(addr);
#endif
*(u16*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
return;
case 0x03000000:
if (SWRAM_ARM9)
{
#ifdef JIT_ENABLED
ARMJIT::InvalidateSWRAM9IfNecessary(addr);
#endif
*(u16*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask] = val;
}
return;
@ -1949,7 +1969,12 @@ void ARM9Write16(u32 addr, u16 val)
case 0x00200000: GPU::WriteVRAM_BBG<u16>(addr, val); return;
case 0x00400000: GPU::WriteVRAM_AOBJ<u16>(addr, val); return;
case 0x00600000: GPU::WriteVRAM_BOBJ<u16>(addr, val); return;
default: GPU::WriteVRAM_LCDC<u16>(addr, val); return;
default:
#ifdef JIT_ENABLED
ARMJIT::InvalidateLCDCIfNecessary(addr);
#endif
GPU::WriteVRAM_LCDC<u16>(addr, val);
return;
}
case 0x07000000:
@ -1989,12 +2014,18 @@ void ARM9Write32(u32 addr, u32 val)
switch (addr & 0xFF000000)
{
case 0x02000000:
#ifdef JIT_ENABLED
ARMJIT::InvalidateMainRAMIfNecessary(addr);
#endif
*(u32*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
return ;
case 0x03000000:
if (SWRAM_ARM9)
{
#ifdef JIT_ENABLED
ARMJIT::InvalidateSWRAM9IfNecessary(addr);
#endif
*(u32*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask] = val;
}
return;
@ -2015,7 +2046,12 @@ void ARM9Write32(u32 addr, u32 val)
case 0x00200000: GPU::WriteVRAM_BBG<u32>(addr, val); return;
case 0x00400000: GPU::WriteVRAM_AOBJ<u32>(addr, val); return;
case 0x00600000: GPU::WriteVRAM_BOBJ<u32>(addr, val); return;
default: GPU::WriteVRAM_LCDC<u32>(addr, val); return;
default:
#ifdef JIT_ENABLED
ARMJIT::InvalidateLCDCIfNecessary(addr);
#endif
GPU::WriteVRAM_LCDC<u32>(addr, val);
return;
}
case 0x07000000:
@ -2279,30 +2315,38 @@ u32 ARM7Read32(u32 addr)
void ARM7Write8(u32 addr, u8 val)
{
#ifdef JIT_ENABLED
ARMJIT::InvalidateByAddr7(addr);
#endif
switch (addr & 0xFF800000)
{
case 0x02000000:
case 0x02800000:
#ifdef JIT_ENABLED
ARMJIT::InvalidateMainRAMIfNecessary(addr);
#endif
*(u8*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
return;
case 0x03000000:
if (SWRAM_ARM7)
{
#ifdef JIT_ENABLED
ARMJIT::InvalidateSWRAM7IfNecessary(addr);
#endif
*(u8*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask] = val;
return;
}
else
{
#ifdef JIT_ENABLED
ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
#endif
*(u8*)&ARM7WRAM[addr & 0xFFFF] = val;
return;
}
case 0x03800000:
#ifdef JIT_ENABLED
ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
#endif
*(u8*)&ARM7WRAM[addr & 0xFFFF] = val;
return;
@ -2312,6 +2356,9 @@ void ARM7Write8(u32 addr, u8 val)
case 0x06000000:
case 0x06800000:
#ifdef JIT_ENABLED
ARMJIT::InvalidateARM7WVRAMIfNecessary(addr);
#endif
GPU::WriteVRAM_ARM7<u8>(addr, val);
return;
@ -2342,30 +2389,38 @@ void ARM7Write8(u32 addr, u8 val)
void ARM7Write16(u32 addr, u16 val)
{
#ifdef JIT_ENABLED
ARMJIT::InvalidateByAddr7(addr);
#endif
switch (addr & 0xFF800000)
{
case 0x02000000:
case 0x02800000:
#ifdef JIT_ENABLED
ARMJIT::InvalidateMainRAMIfNecessary(addr);
#endif
*(u16*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
return;
case 0x03000000:
if (SWRAM_ARM7)
{
#ifdef JIT_ENABLED
ARMJIT::InvalidateSWRAM7IfNecessary(addr);
#endif
*(u16*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask] = val;
return;
}
else
{
#ifdef JIT_ENABLED
ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
#endif
*(u16*)&ARM7WRAM[addr & 0xFFFF] = val;
return;
}
case 0x03800000:
#ifdef JIT_ENABLED
ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
#endif
*(u16*)&ARM7WRAM[addr & 0xFFFF] = val;
return;
@ -2383,6 +2438,9 @@ void ARM7Write16(u32 addr, u16 val)
case 0x06000000:
case 0x06800000:
#ifdef JIT_ENABLED
ARMJIT::InvalidateARM7WVRAMIfNecessary(addr);
#endif
GPU::WriteVRAM_ARM7<u16>(addr, val);
return;
@ -2415,30 +2473,38 @@ void ARM7Write16(u32 addr, u16 val)
void ARM7Write32(u32 addr, u32 val)
{
#ifdef JIT_ENABLED
ARMJIT::InvalidateByAddr7(addr);
#endif
switch (addr & 0xFF800000)
{
case 0x02000000:
case 0x02800000:
#ifdef JIT_ENABLED
ARMJIT::InvalidateMainRAMIfNecessary(addr);
#endif
*(u32*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
return;
case 0x03000000:
if (SWRAM_ARM7)
{
#ifdef JIT_ENABLED
ARMJIT::InvalidateSWRAM7IfNecessary(addr);
#endif
*(u32*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask] = val;
return;
}
else
{
#ifdef JIT_ENABLED
ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
#endif
*(u32*)&ARM7WRAM[addr & 0xFFFF] = val;
return;
}
case 0x03800000:
#ifdef JIT_ENABLED
ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
#endif
*(u32*)&ARM7WRAM[addr & 0xFFFF] = val;
return;
@ -2457,6 +2523,9 @@ void ARM7Write32(u32 addr, u32 val)
case 0x06000000:
case 0x06800000:
#ifdef JIT_ENABLED
ARMJIT::InvalidateARM7WVRAMIfNecessary(addr);
#endif
GPU::WriteVRAM_ARM7<u32>(addr, val);
return;