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integrate changes from ARM64 backend and more

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- better handle LDM/STM in reg alloc
- unify Halted and IRQ in anticipation for branch inlining
- literal optimisations can be disabled in gui
- jit blocks follow simple returns
- fix idle loop detection
- break jit blocks on IRQ (fixes saving in Pokemon White)
This commit is contained in:
RSDuck
2019-10-18 13:29:17 +02:00
parent 9cf7780e46
commit 441869a105
11 changed files with 153 additions and 43 deletions
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40
src/ARM.cpp
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@ -159,7 +159,7 @@ void ARM::DoSavestate(Savestate* file)
file->Var32((u32*)&Cycles);
//file->Var32((u32*)&CyclesToRun);
file->Var32(&Halted);
file->Var32(&StopExecution);
file->VarArray(R, 16*sizeof(u32));
file->Var32(&CPSR);
@ -632,16 +632,21 @@ void ARMv5::ExecuteJIT()
NDS::ARM9Timestamp += Cycles;
Cycles = 0;
if (IRQ) TriggerIRQ();
if (Halted)
if (StopExecution)
{
bool idleLoop = Halted & 0x20;
Halted &= ~0x20;
if ((Halted == 1 || idleLoop) && NDS::ARM9Timestamp < NDS::ARM9Target)
if (IRQ)
TriggerIRQ();
if (Halted || IdleLoop)
{
NDS::ARM9Timestamp = NDS::ARM9Target;
bool idleLoop = IdleLoop;
IdleLoop = 0;
if ((Halted == 1 || idleLoop) && NDS::ARM9Timestamp < NDS::ARM9Target)
{
NDS::ARM9Timestamp = NDS::ARM9Target;
}
break;
}
break;
}
}
@ -769,16 +774,21 @@ void ARMv4::ExecuteJIT()
Cycles = 0;
// TODO optimize this shit!!!
if (IRQ) TriggerIRQ();
if (Halted)
if (StopExecution)
{
bool idleLoop = Halted & 0x20;
Halted &= ~0x20;
if ((Halted == 1 || idleLoop) && NDS::ARM7Timestamp < NDS::ARM7Target)
if (IRQ)
TriggerIRQ();
if (Halted || IdleLoop)
{
NDS::ARM7Timestamp = NDS::ARM7Target;
bool idleLoop = IdleLoop;
IdleLoop = 0;
if ((Halted == 1 || idleLoop) && NDS::ARM7Timestamp < NDS::ARM7Target)
{
NDS::ARM7Timestamp = NDS::ARM7Target;
}
break;
}
break;
}
}