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get the DSP HLE branch started, I guess

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This commit is contained in:
Arisotura
2025-07-09 19:44:33 +02:00
parent e099cfdc5a
commit 444b370a36
3 changed files with 25 additions and 13 deletions
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6
src/DSi.cpp
View File

@ -1113,6 +1113,12 @@ void DSi::MapNWRAM_B(u32 num, u8 val)
u8 oldval = (MBK[0][mbkn] >> mbks) & 0xFF;
if (oldval == val) return;
// TODO REMOVE ME
if ((val&3)==2 || (val&3)==3)
{
debug(0);
}
JIT.Memory.RemapNWRAM(1);
MBK[0][mbkn] &= ~(0xFF << mbks);

24
src/DSi_DSP.cpp
View File

@ -267,7 +267,7 @@ void DSi_DSP::PDataDMAWrite(u16 wrval)
}
break;
default: return;
}
}printf("DSP: PDATA write %08X -> %04X\n", addr, wrval);
if (DSP_PCFG & (1<<1)) // auto-increment
++DSP_PADR; // overflows and stays within a 64k 'page' // TODO: is this +1 or +2?
@ -306,7 +306,7 @@ u16 DSi_DSP::PDataDMARead()
}
break;
default: return r;
}
}printf("DSP: PDATA read %08X -> %04X\n", addr, r);
if (DSP_PCFG & (1<<1)) // auto-increment
++DSP_PADR; // overflows and stays within a 64k 'page' // TODO: is this +1 or +2?
@ -352,7 +352,7 @@ u16 DSi_DSP::PDataDMAReadMMIO()
if (!PDATAReadFifo.IsEmpty())
ret = PDATAReadFifo.Read();
printf("DSP: actually read PDATA FIFO (%04X)\n",ret);
// aha, there's more to come
if (PDataDMALen != 0)
{
@ -424,17 +424,17 @@ u16 DSi_DSP::Read16(u32 addr)
case 0x24:
{
u16 r = TeakraCore->RecvData(0);
u16 r = TeakraCore->RecvData(0);printf("DSP: read CMD0, %04X\n", r);
return r;
}
case 0x2C:
{
u16 r = TeakraCore->RecvData(1);
u16 r = TeakraCore->RecvData(1);printf("DSP: read CMD1, %04X\n", r);
return r;
}
case 0x34:
{
u16 r = TeakraCore->RecvData(2);
u16 r = TeakraCore->RecvData(2);printf("DSP: read CMD2, %04X\n", r);
return r;
}
}
@ -469,6 +469,7 @@ void DSi_DSP::Write8(u32 addr, u8 val)
// no REPx writes
}
}
bool fazil = false;
void DSi_DSP::Write16(u32 addr, u16 val)
{
Log(LogLevel::Debug,"DSP WRITE16 %d %08X %08X %08X\n", IsDSPCoreEnabled(), addr, val, DSi.GetPC(0));
@ -485,6 +486,11 @@ void DSi_DSP::Write16(u32 addr, u16 val)
DSP_PCFG = val;
if (DSP_PCFG & (1<<0))
TeakraCore->Reset();
/*else if (!fazil)
{
fazil = true;
DSi.debug(0);
}*/
if (DSP_PCFG & (1<<4))
PDataDMAStart();
else
@ -508,15 +514,15 @@ void DSi_DSP::Write16(u32 addr, u16 val)
// SEM not writable
case 0x20: // CMD0
DSP_CMD[0] = val;
DSP_CMD[0] = val;printf("DSP: CMD0 = %04X\n", val);
TeakraCore->SendData(0, val);
break;
case 0x28: // CMD1
DSP_CMD[1] = val;
DSP_CMD[1] = val;printf("DSP: CMD1 = %04X\n", val);
TeakraCore->SendData(1, val);
break;
case 0x30: // CMD2
DSP_CMD[2] = val;
DSP_CMD[2] = val;printf("DSP: CMD2 = %04X\n", val);
TeakraCore->SendData(2, val);
break;

8
src/NDS.cpp
View File

@ -1901,8 +1901,8 @@ void NDS::debug(u32 param)
}
Platform::CloseFile(shit);*/
/*FILE*
shit = fopen("debug/camera9.bin", "wb");
FILE*
shit = fopen("debug/castle9.bin", "wb");
fwrite(ARM9.ITCM, 0x8000, 1, shit);
for (u32 i = 0x02000000; i < 0x04000000; i+=4)
{
@ -1910,13 +1910,13 @@ void NDS::debug(u32 param)
fwrite(&val, 4, 1, shit);
}
fclose(shit);
shit = fopen("debug/camera7.bin", "wb");
shit = fopen("debug/castle7.bin", "wb");
for (u32 i = 0x02000000; i < 0x04000000; i+=4)
{
u32 val = ARM7Read32(i);
fwrite(&val, 4, 1, shit);
}
fclose(shit);*/
fclose(shit);
}