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mcr is also affected
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parent
0c887202e7
commit
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@ -216,10 +216,12 @@ void A_MCR(ARM* cpu)
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u32 cn = (cpu->CurInstr >> 16) & 0xF;
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u32 cm = cpu->CurInstr & 0xF;
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u32 cpinfo = (cpu->CurInstr >> 5) & 0x7;
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u32 val = cpu->R[(cpu->CurInstr>>12)&0xF];
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if (((cpu->CurInstr>>12) & 0xF) == 15) val += 4;
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if (cpu->Num==0 && cp==15)
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{
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((ARMv5*)cpu)->CP15Write((cn<<8)|(cm<<4)|cpinfo, cpu->R[(cpu->CurInstr>>12)&0xF]);
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((ARMv5*)cpu)->CP15Write((cn<<8)|(cm<<4)|cpinfo, val);
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}
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else if (cpu->Num==1 && cp==14)
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{
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