implement comparison instrs w/ rd == 15

This commit is contained in:
Jaklyy 2024-09-16 21:27:31 -04:00
parent e5654ec541
commit 89e8549a55

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@ -583,6 +583,11 @@ A_IMPLEMENT_ALU_OP(RSC,)
u32 res = a & b; \
cpu->SetNZ(res & 0x80000000, \
!res); \
if (((cpu->CurInstr>>12) & 0xF) == 15) /* yes this instruction has a secret rd for some reason */ \
{ \
if (cpu->Num == 1) cpu->RestoreCPSR(); /* ARM7TDMI restores cpsr and does ___not___ flush the pipeline. */ \
else Platform::Log(Platform::LogLevel::Warn, "UNIMPLEMENTED: WHO IS USING TST w/ rd == 15???"); \
} \
if (c) cpu->AddCycles_CI(c); else cpu->AddCycles_C();
A_IMPLEMENT_ALU_TEST(TST,_S)
@ -593,6 +598,11 @@ A_IMPLEMENT_ALU_TEST(TST,_S)
u32 res = a ^ b; \
cpu->SetNZ(res & 0x80000000, \
!res); \
if (((cpu->CurInstr>>12) & 0xF) == 15) /* yes this instruction has a secret rd for some reason */ \
{ \
if (cpu->Num == 1) cpu->RestoreCPSR(); /* ARM7TDMI restores cpsr and does ___not___ flush the pipeline. */ \
else Platform::Log(Platform::LogLevel::Warn, "UNIMPLEMENTED: WHO IS USING TEQ w/ rd == 15???"); \
} \
if (c) cpu->AddCycles_CI(c); else cpu->AddCycles_C();
A_IMPLEMENT_ALU_TEST(TEQ,_S)
@ -605,6 +615,11 @@ A_IMPLEMENT_ALU_TEST(TEQ,_S)
!res, \
CarrySub(a, b), \
OverflowSub(a, b)); \
if (((cpu->CurInstr>>12) & 0xF) == 15) /* yes this instruction has a secret rd for some reason */ \
{ \
if (cpu->Num == 1) cpu->RestoreCPSR(); /* ARM7TDMI restores cpsr and does ___not___ flush the pipeline. */ \
else Platform::Log(Platform::LogLevel::Warn, "UNIMPLEMENTED: WHO IS USING CMP w/ rd == 15???"); \
} \
if (c) cpu->AddCycles_CI(c); else cpu->AddCycles_C();
A_IMPLEMENT_ALU_TEST(CMP,)
@ -617,6 +632,11 @@ A_IMPLEMENT_ALU_TEST(CMP,)
!res, \
CarryAdd(a, b), \
OverflowAdd(a, b)); \
if (((cpu->CurInstr>>12) & 0xF) == 15) /* yes this instruction has a secret rd for some reason */ \
{ \
if (cpu->Num == 1) cpu->RestoreCPSR(); /* ARM7TDMI restores cpsr and does ___not___ flush the pipeline. */ \
else Platform::Log(Platform::LogLevel::Warn, "UNIMPLEMENTED: WHO IS USING CMN w/ rd == 15???"); \
} \
if (c) cpu->AddCycles_CI(c); else cpu->AddCycles_C();
A_IMPLEMENT_ALU_TEST(CMN,)
@ -1569,6 +1589,11 @@ void T_CMP_HIREG(ARM* cpu)
!res,
CarrySub(a, b),
OverflowSub(a, b));
if (rd == 15) \
{ \
if (cpu->Num == 1) cpu->RestoreCPSR(); /* ARM7TDMI restores cpsr and does ___not___ flush the pipeline. */ \
else Platform::Log(Platform::LogLevel::Warn, "UNIMPLEMENTED: CMP HIREG w/ rd == 15."); \
} \
cpu->AddCycles_C();
}