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ldrd is just ldm
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ae0824fdd3
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@ -262,7 +262,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
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if (r&1) { A_UNK(cpu); return; } /* checkme */ \
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if (!cpu->DataRead32 (offset , &cpu->R[r ])) {cpu->AddCycles_CDI(); return;} \
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u32 val; if (!cpu->DataRead32S(offset+4, &val)) {cpu->AddCycles_CDI(); return;} \
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if (r == 14) cpu->JumpTo(((((ARMv5*)cpu)->CP15Control & (1<<15)) ? (val & ~0x1) : val), true); /* restores cpsr for some reason? */ \
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if (r == 14) cpu->JumpTo(((((ARMv5*)cpu)->CP15Control & (1<<15)) ? (val & ~0x1) : val), cpu->CurInstr & (1<<22)); /* restores cpsr due to shared ldm dna */ \
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else cpu->R[r+1] = val; \
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cpu->AddCycles_CDI(); \
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if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset;
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@ -274,7 +274,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
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if (r&1) { A_UNK(cpu); return; } /* checkme */ \
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if (!cpu->DataRead32 (addr , &cpu->R[r ])) {cpu->AddCycles_CDI(); return;} \
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u32 val; if (!cpu->DataRead32S(addr+4, &val)) {cpu->AddCycles_CDI(); return;} \
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if (r == 14) cpu->JumpTo(((((ARMv5*)cpu)->CP15Control & (1<<15)) ? (val & ~0x1) : val), true); /* restores cpsr for some reason? */ \
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if (r == 14) cpu->JumpTo(((((ARMv5*)cpu)->CP15Control & (1<<15)) ? (val & ~0x1) : val), cpu->CurInstr & (1<<22)); /* restores cpsr due to shared ldm dna */ \
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else cpu->R[r+1] = val; \
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cpu->AddCycles_CDI(); \
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cpu->R[(cpu->CurInstr>>16) & 0xF] += offset;
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