Commit Graph

24 Commits

Author SHA1 Message Date
346dd4006e Move all core types into namespaces (#1886)
* Reorganize namespaces

- Most types are now moved into the `melonDS` namespace
- Only good chance to do this for a while, since a big refactor is next

* Fix the build
2023-11-25 18:32:09 +01:00
544fefa27f Refactor the JIT to be object-oriented (#1879)
* Move TinyVector to a new file

- So it's less sensitive to #include ordering

* Forgot to include assert.h

* Refactor ARMJIT_Memory into an object

* Oops, forgot a declaration

* Refactor ARMJIT to be contained in an object

* Remove an unused function declaration

* Add a missing #include

* Remove a now-unused global

* Use ARMJIT_Memory's own memory access functions

* Fix some omissions in the ARM JIT

* Move libandroid to be a member of ARMJIT_Memory instead of a global

* Default-initialize most fields in ARMJIT_Compiler.h

* Define NOOP_IF_NO_JIT

* Finish refactoring the JIT to be object-oriented
2023-11-18 16:40:54 +01:00
ac38faef14 update copyright years 2023-11-04 00:21:46 +01:00
32609bbc98 invalidate JIT blocks in ARM7 WVRAM when it's remapped 2022-08-22 00:39:08 +02:00
9394dde67a fix copyright headers 2022-03-07 21:08:54 +01:00
35cc79787d update copyright headers 2022-01-09 02:15:50 +01:00
c1dcd585be decouple JIT from Config. bahahahahah 2021-11-17 18:15:50 +01:00
8513900892 ARM64 macOS JIT - fix warnings + some cleanup 2021-07-23 14:07:23 +01:00
436b3c4c1d update copyright year and add missing GPL headers 2021-03-12 20:07:40 +01:00
c5381d2911 reconcile DSi and JIT, fastmem for x64 and Windows 2020-06-30 23:50:41 +02:00
e335a8ca76 first steps in bringing over the JIT refactor/fastmem 2020-06-16 12:11:19 +02:00
0f53a34551 rewrite JIT memory emulation 2020-05-09 00:45:05 +02:00
3787bab1f6 implement block linking + some refactoring
currently only supported for x64
2020-04-26 13:05:17 +02:00
386100c053 make literal optimisation more reliable
fixes spanish Pokemon HeartGold
2020-04-26 13:05:06 +02:00
a687be9879 new block cache and much more...
- more reliable code invalidation detection
- blocks aren't stopped at any branch, but are being followed
if possible to get larger blocks
- idle loop recognition
- optimised literal loads, load/store cycle counting
 and loads/stores from constant addresses
2020-04-26 13:05:03 +02:00
5338c28f40 load register only if needed
- do thumb bl long merge in the first step
- preparations for better branch jitting
2020-04-26 13:05:02 +02:00
5ea91b8a03 optimise away unneeded flag sets
- especially useful for thumb code and larger max block sizes
- can still be improved upon
2020-04-26 13:05:00 +02:00
9d180c7bbc jit: decrease blockcache AddrMapping size for ARM9 2020-04-26 13:03:09 +02:00
9d76d63af5 jit: make everything configurable 2020-04-26 13:03:03 +02:00
c58fdbd66b jit: branch instructions 2020-04-26 13:02:58 +02:00
2c44bf927c JIT: most mem instructions working
+ branching
2020-04-26 13:02:57 +02:00
5f932cdf48 JIT: compilation of word load and store 2020-04-26 13:02:56 +02:00
ebce9f035f JIT: implemented most ALU instructions 2020-04-26 13:02:55 +02:00
c5c342c009 JIT: base
all instructions are interpreted
2020-04-26 13:02:53 +02:00