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1,110 Commits 56 Branches 24 Tags
96b8ac1af2f2ac08df25625532e9179f0e75c54c
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1110 Commits

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Author SHA1 Message Date
RSDuck
96b8ac1af2 preparations for block linking 2020-04-26 13:05:15 +02:00
RSDuck
0280fbe194 this mistake was phenomally stupid 2020-04-26 13:05:14 +02:00
RSDuck
05962d9798 the time of good commit names is long gone 2020-04-26 13:05:14 +02:00
RSDuck
e9760c941b git played a prank on me haha very funny 2020-04-26 13:05:14 +02:00
RSDuck
2e6e6aa750 this it should work 2020-04-26 13:05:13 +02:00
RSDuck
266fd20ea5 fixup for aarch64 JIT 2020-04-26 13:05:12 +02:00
RSDuck
42d67c8145 fix LDM usermode for aarch64 as well 2020-04-26 13:05:12 +02:00
RSDuck
2dbb9840fb re add error for unsupported JIT platforms 2020-04-26 13:05:11 +02:00
RSDuck
899cf97c51 apply fixes for aarch64 linux by @nadiaholmquist 2020-04-26 13:05:10 +02:00
RSDuck
d6cc7de6c4 move ARM64 JIT backend here 2020-04-26 13:05:09 +02:00
RSDuck
842df432aa remove debug leftovers 2020-04-26 13:05:09 +02:00
RSDuck
9b98b8816a improve nop handling and proper behaviour for LDM^ 
fixes dslinux
 2020-04-26 13:05:08 +02:00
RSDuck
60650fa82e disable literal optimations in DTCM 2020-04-26 13:05:07 +02:00
RSDuck
0c5311731b make savestates 100% compatible again 2020-04-26 13:05:07 +02:00
RSDuck
386100c053 make literal optimisation more reliable 
fixes spanish Pokemon HeartGold
 2020-04-26 13:05:06 +02:00
RSDuck
803c61e126 fix config key for jit literal optimisations 2020-04-26 13:05:06 +02:00
RSDuck
81f38c14be integrate changes from ARM64 backend and more 
- better handle LDM/STM in reg alloc
- unify Halted and IRQ in anticipation for branch inlining
- literal optimisations can be disabled in gui
- jit blocks follow simple returns
- fix idle loop detection
- break jit blocks on IRQ (fixes saving in Pokemon White)
 2020-04-26 13:05:05 +02:00
RSDuck
aa23f21b8d decrease jit block cache address granularity 
fixes Dragon Quest IX
move code with side effects out of assert, fixes release build
(thanks to m4wx for this one)
also remove some leftovers of jit pipelining
 2020-04-26 13:05:05 +02:00
RSDuck
7424f9fda0 remove leftover debug code 2020-04-26 13:05:04 +02:00
RSDuck
a687be9879 new block cache and much more... 
- more reliable code invalidation detection
- blocks aren't stopped at any branch, but are being followed
if possible to get larger blocks
- idle loop recognition
- optimised literal loads, load/store cycle counting
 and loads/stores from constant addresses
 2020-04-26 13:05:03 +02:00
RSDuck
5338c28f40 load register only if needed 
- do thumb bl long merge in the first step
- preparations for better branch jitting
 2020-04-26 13:05:02 +02:00
RSDuck
2ef776883f more fixes for flag optimisation 
+ small cycle counting optimisation
 2020-04-26 13:05:02 +02:00
RSDuck
5202c505ab remove debug printing 2020-04-26 13:05:01 +02:00
RSDuck
ea562d2fec fixes for flag optimisation 2020-04-26 13:05:01 +02:00
RSDuck
b5dda7d6e2 add ui confirm dialog for linux 2020-04-26 13:05:00 +02:00
RSDuck
5ea91b8a03 optimise away unneeded flag sets 
- especially useful for thumb code and larger max block sizes
- can still be improved upon
 2020-04-26 13:05:00 +02:00
RSDuck
03ab7f1645 fix jit block size not changeable 2020-04-26 13:04:59 +02:00
RSDuck
3001d9492c abandon pipelining on jit 
fixes Golden Sun Dawn
this makes the cpu state incompatible between interpreter and JIT. That's why switching cpu mode requires a restart(not requiring is stupid anyway) and the pipeline is manually filled when making a save state.
 2020-04-26 13:04:59 +02:00
RSDuck
ec21172cd9 fix register alloc for half word loads 
fixes Mega Man Star Force 2 with cheat applied
it probably used a pc relative load which were interpreted as branches
 2020-04-26 13:04:58 +02:00
RSDuck
5e443e7962 remove unneeded dolphin code, C++11 static_assert 2020-04-26 13:04:57 +02:00
Arisotura
dcf21c98f2 add the JIT shito to the Codeblocks project 2020-04-26 13:04:56 +02:00
RSDuck
f31976fed0 jit: fix RSC 2020-04-26 13:03:12 +02:00
RSDuck
707da1f4c7 remove debug printf 2020-04-26 13:03:11 +02:00
RSDuck
51b6b7a7d5 fix uninitialised memory mapping 2020-04-26 13:03:11 +02:00
RSDuck
4a0f6b3b4b jit: fix thumb hi reg alu and mcr halt 
+ mcr/mrc aren't always, msr_imm is never unk on ARM7
 2020-04-26 13:03:10 +02:00
RSDuck
9d180c7bbc jit: decrease blockcache AddrMapping size for ARM9 2020-04-26 13:03:09 +02:00
RSDuck
be8846e31a jit: fix misc static branch things 2020-04-26 13:03:08 +02:00
RSDuck
54985be157 jit: LDM/STM keep proper stack alignment 2020-04-26 13:03:08 +02:00
RSDuck
8ddc4d5904 jit: fix BLX_reg with rn=lr 2020-04-26 13:03:07 +02:00
RSDuck
411fb57c07 jit: add compile option 2020-04-26 13:03:06 +02:00
RSDuck
360317be8c jit: remove unnessary files from dolphin 2020-04-26 13:03:04 +02:00
RSDuck
9d76d63af5 jit: make everything configurable 2020-04-26 13:03:03 +02:00
RSDuck
dcf6e1cad2 jit: fix linux 2020-04-26 13:03:01 +02:00
RSDuck
6f0dcad4f6 jit: fix wrongly placed const 2020-04-26 13:03:01 +02:00
RSDuck
9b3c14b58a jit: SMULL and SMLAL 2020-04-26 13:03:00 +02:00
RSDuck
2efab201e9 jit: LDM/STM finally(!) working + MUL, MLA and CLZ 2020-04-26 13:02:59 +02:00
RSDuck
c58fdbd66b jit: branch instructions 2020-04-26 13:02:58 +02:00
RSDuck
ff97211114 jit: thumb block transfer working 
also pc and sp relative loads and some refactoring
 2020-04-26 13:02:57 +02:00
RSDuck
2c44bf927c JIT: most mem instructions working 
+ branching
 2020-04-26 13:02:57 +02:00
RSDuck
5f932cdf48 JIT: compilation of word load and store 2020-04-26 13:02:56 +02:00