Commit Graph

17 Commits

Author SHA1 Message Date
ec965c6014 improve nop handling and proper behaviour for LDM^
fixes dslinux
2020-06-16 11:57:49 +02:00
000c03c9d6 disable literal optimations in DTCM 2020-06-16 11:57:48 +02:00
3e7483636f make literal optimisation more reliable
fixes spanish Pokemon HeartGold
2020-06-16 11:57:47 +02:00
441869a105 integrate changes from ARM64 backend and more
- better handle LDM/STM in reg alloc
- unify Halted and IRQ in anticipation for branch inlining
- literal optimisations can be disabled in gui
- jit blocks follow simple returns
- fix idle loop detection
- break jit blocks on IRQ (fixes saving in Pokemon White)
2020-06-16 11:57:45 +02:00
9cf7780e46 decrease jit block cache address granularity
fixes Dragon Quest IX
move code with side effects out of assert, fixes release build
(thanks to m4wx for this one)
also remove some leftovers of jit pipelining
2020-06-16 11:56:45 +02:00
40b88ab05a new block cache and much more...
- more reliable code invalidation detection
- blocks aren't stopped at any branch, but are being followed
if possible to get larger blocks
- idle loop recognition
- optimised literal loads, load/store cycle counting
 and loads/stores from constant addresses
2020-06-16 11:56:36 +02:00
85680d6fe5 more fixes for flag optimisation
+ small cycle counting optimisation
2020-06-16 11:56:01 +02:00
316378092a abandon pipelining on jit
fixes Golden Sun Dawn
this makes the cpu state incompatible between interpreter and JIT. That's why switching cpu mode requires a restart(not requiring is stupid anyway) and the pipeline is manually filled when making a save state.
2020-06-16 11:55:24 +02:00
86b96ca47a remove unneeded dolphin code, C++11 static_assert 2020-06-16 11:54:50 +02:00
3167ddcde1 jit: LDM/STM keep proper stack alignment 2020-06-16 11:54:04 +02:00
0ff79ea2ad jit: fix linux 2020-06-16 11:53:11 +02:00
f22521a43d jit: LDM/STM finally(!) working + MUL, MLA and CLZ 2020-06-16 11:53:10 +02:00
83bd863361 jit: branch instructions 2020-06-16 11:53:09 +02:00
27cbc821b1 jit: thumb block transfer working
also pc and sp relative loads and some refactoring
2020-06-16 11:53:08 +02:00
10e386fe50 JIT: most mem instructions working
+ branching
2020-06-16 11:53:08 +02:00
550e6b86d2 JIT: compilation of word load and store 2020-06-16 11:53:07 +02:00
ea98a44e1e jit: correct cycle counting for thumb shift by reg 2020-06-16 11:53:06 +02:00