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Avoid shadowing variables.

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git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6712 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
Soren Jorvang 2011-01-01 20:00:03 +00:00
parent 4f2bfd181a
commit 527057cb27
6 changed files with 15 additions and 11 deletions
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4
Source/Core/DSPCore/Src/DSPEmitter.cpp
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@ -486,7 +486,7 @@ void DSPEmitter::CompileDispatcher()
MOV(64, R(RAX), ImmPtr(&g_dsp.cr)); MOV(64, R(RAX), ImmPtr(&g_dsp.cr));
TEST(8, MatR(RAX), Imm8(CR_HALT)); TEST(8, MatR(RAX), Imm8(CR_HALT));
#endif #endif
FixupBranch halt = J_CC(CC_NE); FixupBranch _halt = J_CC(CC_NE);
#ifdef _M_IX86 #ifdef _M_IX86
MOVZX(32, 16, ECX, M(&g_dsp.pc)); MOVZX(32, 16, ECX, M(&g_dsp.pc));
@ -512,7 +512,7 @@ void DSPEmitter::CompileDispatcher()
J_CC(CC_A, dispatcherLoop); J_CC(CC_A, dispatcherLoop);
// DSP gave up the remaining cycles. // DSP gave up the remaining cycles.
SetJumpTarget(halt); SetJumpTarget(_halt);
//MOV(32, M(&cyclesLeft), Imm32(0)); //MOV(32, M(&cyclesLeft), Imm32(0));
ABI_PopAllCalleeSavedRegsAndAdjustStack(); ABI_PopAllCalleeSavedRegsAndAdjustStack();
RET(); RET();

6
Source/Core/DSPCore/Src/DspIntArithmetic.cpp
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@ -382,7 +382,7 @@ void addr(const UDSPInstruction opc)
u8 sreg = ((opc >> 9) & 0x3) + DSP_REG_AXL0; u8 sreg = ((opc >> 9) & 0x3) + DSP_REG_AXL0;
s64 acc = dsp_get_long_acc(dreg); s64 acc = dsp_get_long_acc(dreg);
s64 ax; s64 ax = 0;
switch(sreg) { switch(sreg) {
case DSP_REG_AXL0: case DSP_REG_AXL0:
case DSP_REG_AXL1: case DSP_REG_AXL1:
@ -581,7 +581,7 @@ void subr(const UDSPInstruction opc)
u8 sreg = ((opc >> 9) & 0x3) + DSP_REG_AXL0; u8 sreg = ((opc >> 9) & 0x3) + DSP_REG_AXL0;
s64 acc = dsp_get_long_acc(dreg); s64 acc = dsp_get_long_acc(dreg);
s64 ax; s64 ax = 0;
switch(sreg) { switch(sreg) {
case DSP_REG_AXL0: case DSP_REG_AXL0:
case DSP_REG_AXL1: case DSP_REG_AXL1:
@ -758,7 +758,7 @@ void movr(const UDSPInstruction opc)
u8 areg = (opc >> 8) & 0x1; u8 areg = (opc >> 8) & 0x1;
u8 sreg = ((opc >> 9) & 0x3) + DSP_REG_AXL0; u8 sreg = ((opc >> 9) & 0x3) + DSP_REG_AXL0;
s64 ax; s64 ax = 0;
switch(sreg) { switch(sreg) {
case DSP_REG_AXL0: case DSP_REG_AXL0:
case DSP_REG_AXL1: case DSP_REG_AXL1:

2
Source/Core/DSPCore/Src/Jit/DSPJitArithmetic.cpp
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@ -21,7 +21,9 @@
#include "../DSPIntUtil.h" #include "../DSPIntUtil.h"
#include "../DSPEmitter.h" #include "../DSPEmitter.h"
#include "../DSPAnalyzer.h" #include "../DSPAnalyzer.h"
#ifdef _M_X64
#include "DSPJitUtil.h" #include "DSPJitUtil.h"
#endif
#include "x64Emitter.h" #include "x64Emitter.h"
#include "ABI.h" #include "ABI.h"
using namespace Gen; using namespace Gen;

4
Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp
View File

@ -79,7 +79,7 @@ void DSPEmitter::s(const UDSPInstruction opc)
{ {
u8 dreg = opc & 0x3; u8 dreg = opc & 0x3;
u8 sreg = ((opc >> 3) & 0x3) + DSP_REG_ACL0; u8 sreg = ((opc >> 3) & 0x3) + DSP_REG_ACL0;
u16 *sregp; u16 *sregp = 0;
switch(sreg) { switch(sreg) {
case DSP_REG_ACL0: case DSP_REG_ACL0:
case DSP_REG_ACL1: case DSP_REG_ACL1:
@ -115,7 +115,7 @@ void DSPEmitter::sn(const UDSPInstruction opc)
{ {
u8 dreg = opc & 0x3; u8 dreg = opc & 0x3;
u8 sreg = ((opc >> 3) & 0x3) + DSP_REG_ACL0; u8 sreg = ((opc >> 3) & 0x3) + DSP_REG_ACL0;
u16 *sregp; u16 *sregp = 0;
switch(sreg) { switch(sreg) {
case DSP_REG_ACL0: case DSP_REG_ACL0:
case DSP_REG_ACL1: case DSP_REG_ACL1:

2
Source/Core/DSPCore/Src/Jit/DSPJitMultiplier.cpp
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@ -23,7 +23,9 @@
#include "../DSPIntUtil.h" #include "../DSPIntUtil.h"
#include "../DSPEmitter.h" #include "../DSPEmitter.h"
#include "../DSPAnalyzer.h" #include "../DSPAnalyzer.h"
#ifdef _M_X64
#include "DSPJitUtil.h" #include "DSPJitUtil.h"
#endif
#include "x64Emitter.h" #include "x64Emitter.h"
#include "ABI.h" #include "ABI.h"
using namespace Gen; using namespace Gen;

8
Source/Core/DSPCore/Src/Jit/DSPJitUtil.cpp
View File

@ -464,13 +464,13 @@ void DSPEmitter::get_long_prod_round_prodl(X64Reg long_prod)
ADD(64, R(long_prod), Imm32(0x8000)); ADD(64, R(long_prod), Imm32(0x8000));
MOV(64, R(ESI), Imm64(~0xffff)); MOV(64, R(ESI), Imm64(~0xffff));
AND(64, R(long_prod), R(RSI)); AND(64, R(long_prod), R(RSI));
FixupBranch ret = J(); FixupBranch _ret = J();
//else prod = (prod + 0x7fff) & ~0xffff; //else prod = (prod + 0x7fff) & ~0xffff;
SetJumpTarget(jump); SetJumpTarget(jump);
ADD(64, R(long_prod), Imm32(0x7fff)); ADD(64, R(long_prod), Imm32(0x7fff));
MOV(64, R(RSI), Imm64(~0xffff)); MOV(64, R(RSI), Imm64(~0xffff));
AND(64, R(long_prod), R(RSI)); AND(64, R(long_prod), R(RSI));
SetJumpTarget(ret); SetJumpTarget(_ret);
//return prod; //return prod;
#endif #endif
} }
@ -517,13 +517,13 @@ void DSPEmitter::round_long_acc(X64Reg long_acc)
ADD(64, R(long_acc), Imm32(0x8000)); ADD(64, R(long_acc), Imm32(0x8000));
MOV(64, R(ESI), Imm64(~0xffff)); MOV(64, R(ESI), Imm64(~0xffff));
AND(64, R(long_acc), R(RSI)); AND(64, R(long_acc), R(RSI));
FixupBranch ret = J(); FixupBranch _ret = J();
//else prod = (prod + 0x7fff) & ~0xffff; //else prod = (prod + 0x7fff) & ~0xffff;
SetJumpTarget(jump); SetJumpTarget(jump);
ADD(64, R(long_acc), Imm32(0x7fff)); ADD(64, R(long_acc), Imm32(0x7fff));
MOV(64, R(RSI), Imm64(~0xffff)); MOV(64, R(RSI), Imm64(~0xffff));
AND(64, R(long_acc), R(RSI)); AND(64, R(long_acc), R(RSI));
SetJumpTarget(ret); SetJumpTarget(_ret);
//return prod; //return prod;
#endif #endif
} }