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2,033 Commits 53 Branches 22 Tags 29 MiB
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2033 Commits

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Author SHA1 Message Date
StapleButter
7dba0121cb fix bug with ALU operations and shift operands, where the shift operation could obliterate the carry flag 
also, misc shit
 2017-01-20 15:13:44 +01:00
StapleButter
3e5e8f60c4 * some basic BG display code 
* basic, frozen-in-time RTC
* power management device
 2017-01-20 01:18:30 +01:00
StapleButter
d7c1d2a2cd * start GPU shit: draw BG0 16-color. 
* fix a few DMA bugs.
* fix a bug where some code could still run right after a halt instruction.
* fix VRAM mapping, too. I'm an idiot.
 2017-01-18 17:57:12 +01:00
StapleButter
d30e6956fa skeleton for 2D GPU 2017-01-18 04:03:19 +01:00
StapleButter
bff3a92cc0 fix bug that could cause nested IRQs. 
fix potential bug in MSR.
 2017-01-18 03:11:07 +01:00
StapleButter
7f5ee5c00e ARM9 division hardware. POSTFLG register. 2017-01-18 02:20:45 +01:00
StapleButter
9808b73c6f DMA support! 2017-01-18 01:33:06 +01:00
StapleButter
b10a0d64a2 fix bug with IPC FIFO IRQs 2017-01-17 05:29:38 +01:00
StapleButter
8ea2aaad5a separate IO read/write handlers from the rest before it's too late. 
remove some useless cruft.
 2017-01-17 02:29:25 +01:00
StapleButter
45bceecc19 IPC FIFO emulation. 2017-01-17 01:58:25 +01:00
StapleButter
8c2f785a0f uh oh! it's getting further 
(also CodeBlocks is fucking dumb)
 2017-01-16 04:47:37 +01:00
StapleButter
af05333290 christ. CodeBlocks is retarded. 
also, lots of crap. I lost track of it.
 2016-12-23 21:22:22 +01:00
StapleButter
9bb3537ede some more crap emulated. 2016-12-06 17:32:51 +01:00
StapleButter
c8a0058ebc implementation of VRAM and other misc crap 2016-12-05 23:17:03 +01:00
StapleButter
8c8c78cf83 misc fixes. 
shit in place to start implementing GPU shit.
GPL headers added before it's too late. (TODO: put actual GPL license in the repo)
also added URL that doesn't exist yet but is reserved.
 2016-12-05 18:02:29 +01:00
StapleButter
343797f47d * somewhat proper event scheduler 
* support for timers
* fixes, additions, shit
 2016-12-05 17:08:24 +01:00
StapleButter
a14c01208a fix some shit. add support for SPI and firmware. 2016-12-04 03:20:50 +01:00
StapleButter
d7c1d77ba2 more instructions. shared WRAM. 2016-12-03 18:29:19 +01:00
StapleButter
1e4086e1b6 moar instructions and shit implemented 2016-12-03 17:58:24 +01:00
StapleButter
f2858e1c47 less amnesia! ITCM, DTCM, corresponding CP15 support 2016-12-03 16:13:04 +01:00
StapleButter
53bef35cd1 more crap implemented! 2016-12-03 15:15:34 +01:00
StapleButter
948cdeab59 amnesia is over 2016-12-03 13:42:27 +01:00
StapleButter
30f85e3400 more instructions. some handling of CPU mode switching. 2016-12-03 04:41:10 +01:00
StapleButter
6213245f3a moar shit 2016-12-03 04:05:23 +01:00
StapleButter
ae6e9d96da ARM ALU is done with. as well as other shit. 2016-12-03 03:10:26 +01:00
StapleButter
844ca45055 add MSR/MRS. also fix misc error with LDR ROR effect. 
see shibboleet, I can do it too :>
 2016-12-03 02:09:04 +01:00
StapleButter
23d584ca4c implement LDR/STR/LDRB/STRB. 
more macro soup.
 2016-12-03 01:31:33 +01:00
StapleButter
97ec988dae more shit! some start of ALU emulation 2016-11-25 00:08:53 +01:00
StapleButter
f74fb2dd27 well, adding shit. laying out the base for the interpreter. really dirty code. 2016-11-24 18:31:49 +01:00
StapleButter
3505ec993b hey look, more crap 
no MrRean this doesn't run NSMB yet
 2016-11-03 01:38:58 +01:00
StapleButter
5b7ae6dab3 add more crap 2016-05-16 17:48:40 +02:00
StapleButter
cfdfd4b231 first real commit, some shit is in 2016-05-16 03:40:11 +02:00
StapleButter
e0255fb957 Initial commit 2016-05-16 03:34:14 +02:00