fd4775c3ca
Fix Ubuntu ARM64 libzip dependency
2020-07-22 15:37:30 +01:00
96e0e37156
Link it up to onOpenFile()
2020-07-22 15:15:56 +01:00
0009a3ffd1
Add the extractROM function
2020-07-22 15:13:14 +01:00
523ff9ff1c
Add libzip dependency in the workflow files and to CMakeLists.txt
2020-07-22 14:22:23 +01:00
3827fa562f
another try
2020-07-09 00:11:47 +02:00
1519b3d5fa
attempt at fixing aarch64 linux yet again
2020-07-08 23:57:43 +02:00
8f5d8d1e12
fix for fastmem when pc is used as immediate
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and (hopefully) make SIGSEGV handler work for aarch64 linux
2020-07-08 23:47:24 +02:00
3786660099
misc JIT changes
2020-07-08 23:08:25 +02:00
778623a8b7
make linux work and fix a few bugs
2020-07-04 18:58:00 +02:00
62c6e2f703
Merge pull request #667 from Arisotura/generic_jit
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merge jit
2020-07-01 00:01:11 +02:00
c5381d2911
reconcile DSi and JIT, fastmem for x64 and Windows
2020-06-30 23:50:41 +02:00
ea6d03581b
make literal optimisation work again
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enable single register block load/store optimisations for x64 aswell
2020-06-16 12:11:20 +02:00
e335a8ca76
first steps in bringing over the JIT refactor/fastmem
2020-06-16 12:11:19 +02:00
fea9f95bba
fix inlined IO register access
2020-06-16 12:06:43 +02:00
e7d076403d
Merge branch 'generic_jit' of https://github.com/Arisotura/melonDS into generic_jit
2020-06-16 12:06:42 +02:00
c17f7b100e
allow allocating caller saved regs on windows
2020-06-16 12:01:10 +02:00
efb796640b
use instr hash as key for restore candidates
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makes Golden Sun burn a little slower through the JIT memory
2020-06-16 12:01:10 +02:00
80b88dbd05
allow allocating caller saved registers
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currently system-v only
2020-06-16 12:01:09 +02:00
052ff73672
rewrite JIT memory emulation
2020-06-16 12:01:08 +02:00
b902cd1b8e
fix regression from last commit
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also a small mistake with msr
2020-06-16 11:59:10 +02:00
5a3607bc68
don't use param registers for ReadBanked/WriteBanked
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should fix linux build
2020-06-16 11:59:09 +02:00
6d217e1010
fix build with JIT disabled and set default JIT maxblock size to 32
2020-06-16 11:59:09 +02:00
dc86bac83d
hopefully fix stack handling for linux
2020-06-16 11:59:08 +02:00
c2dd6a186d
implement msr and mrs for the x64 JIT
2020-06-16 11:59:07 +02:00
1c98cefcee
compile UMULLs and some fixes
2020-06-16 11:59:06 +02:00
1c07932b40
implement block linking + some refactoring
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currently only supported for x64
2020-06-16 11:59:06 +02:00
1ad90cb334
include more information in DataRegion
2020-06-16 11:58:46 +02:00
3ab9e4a4c9
arm64 fix itcm invalidation and ldm^/stm^
2020-06-16 11:57:58 +02:00
3098c6a9a0
preparations for block linking
2020-06-16 11:57:57 +02:00
5ab56cef5f
this mistake was phenomally stupid
2020-06-16 11:57:57 +02:00
225f90cced
the time of good commit names is long gone
2020-06-16 11:57:56 +02:00
c8b7a34383
git played a prank on me haha very funny
2020-06-16 11:57:55 +02:00
262dc7ad00
this it should work
2020-06-16 11:57:55 +02:00
d2acceb367
fixup for aarch64 JIT
2020-06-16 11:57:54 +02:00
2725429727
fix LDM usermode for aarch64 as well
2020-06-16 11:57:53 +02:00
3173e6e25d
re add error for unsupported JIT platforms
2020-06-16 11:57:52 +02:00
0d83e98e04
apply fixes for aarch64 linux by @nadiaholmquist
2020-06-16 11:57:52 +02:00
99b34efe2d
move ARM64 JIT backend here
2020-06-16 11:57:51 +02:00
baed0ac0d5
remove debug leftovers
2020-06-16 11:57:50 +02:00
ec965c6014
improve nop handling and proper behaviour for LDM^
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fixes dslinux
2020-06-16 11:57:49 +02:00
000c03c9d6
disable literal optimations in DTCM
2020-06-16 11:57:48 +02:00
1cfbbcbb2a
make savestates 100% compatible again
2020-06-16 11:57:48 +02:00
3e7483636f
make literal optimisation more reliable
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fixes spanish Pokemon HeartGold
2020-06-16 11:57:47 +02:00
d1d96d2236
fix config key for jit literal optimisations
2020-06-16 11:57:46 +02:00
441869a105
integrate changes from ARM64 backend and more
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- better handle LDM/STM in reg alloc
- unify Halted and IRQ in anticipation for branch inlining
- literal optimisations can be disabled in gui
- jit blocks follow simple returns
- fix idle loop detection
- break jit blocks on IRQ (fixes saving in Pokemon White)
2020-06-16 11:57:45 +02:00
9cf7780e46
decrease jit block cache address granularity
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fixes Dragon Quest IX
move code with side effects out of assert, fixes release build
(thanks to m4wx for this one)
also remove some leftovers of jit pipelining
2020-06-16 11:56:45 +02:00
52dd0ee75a
remove leftover debug code
2020-06-16 11:56:37 +02:00
40b88ab05a
new block cache and much more...
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- more reliable code invalidation detection
- blocks aren't stopped at any branch, but are being followed
if possible to get larger blocks
- idle loop recognition
- optimised literal loads, load/store cycle counting
and loads/stores from constant addresses
2020-06-16 11:56:36 +02:00
0e26aa4ede
load register only if needed
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- do thumb bl long merge in the first step
- preparations for better branch jitting
2020-06-16 11:56:02 +02:00
85680d6fe5
more fixes for flag optimisation
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+ small cycle counting optimisation
2020-06-16 11:56:01 +02:00