Commit Graph

41 Commits

Author SHA1 Message Date
19ddaee13b finally decouple Config from the core. baahhahahahah 2021-11-18 01:17:51 +01:00
c1dcd585be decouple JIT from Config. bahahahahah 2021-11-17 18:15:50 +01:00
55ec724fee more fixes for literal invalidation 2021-08-31 08:13:22 +02:00
8d2746e517 fix #1187
how could this go on unnoticed for so long?
2021-08-31 04:53:25 +02:00
c2152c8f74 JIT: fix ldm with writeback loading rn 2021-07-24 04:35:45 +02:00
aa430608e7 support allocating more registers for aarch64 JIT
also some minor fixes for the x64 JIT as well
2021-06-29 22:25:43 +02:00
436b3c4c1d update copyright year and add missing GPL headers 2021-03-12 20:07:40 +01:00
43348210f9 Fix some compiler warnings 2021-01-25 14:12:13 +00:00
771dfaca2e JIT: handle STR post with rd == rn
fixes Zelda Four Swords
2021-01-19 23:50:08 +01:00
78839f862e JIT fixes
- fix fastmem problems on linux
- small fix memory leak
- SlowWrite functions always take in a 32-bit variable so that the C compiler knows that the values aren't necessary zero extended
- a few other stylistic things
- handle SIGBUS as well (for macos)
2020-11-09 20:43:31 +01:00
0d845c9e69 Random minor fixes (#757)
* Fix incorrect/questionable assert() usage

Originally reported by https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2159000700,
but also includes a bunch of other fixes.

* Fix some `printf` warnings

Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2160310550

* Remove useless check

It is never passed thanks to `if (num_in < 1) {...; return}` before
Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2154840804

* Add missing header guard, rename other to avoid conflicts

Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2163210746

* Make DSi_SDDevice destructor virtual

Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2158670642

* Use thread-safe localtime_r, assign `time` result directly

Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2154840805

* Fix MinGW build

It needs _POSIX_THREAD_SAFE_FUNCTIONS to export `localtime_r`
2020-10-01 13:44:09 +02:00
9772201345 remove some UB
- savestates used to read a four bytes from a single byte value
- a few unassigned variables
- some other things
- also make the ROR macro an inline function
2020-09-04 20:37:14 +02:00
8f5d8d1e12 fix for fastmem when pc is used as immediate
and (hopefully) make SIGSEGV handler work for aarch64 linux
2020-07-08 23:47:24 +02:00
3786660099 misc JIT changes 2020-07-08 23:08:25 +02:00
778623a8b7 make linux work and fix a few bugs 2020-07-04 18:58:00 +02:00
c5381d2911 reconcile DSi and JIT, fastmem for x64 and Windows 2020-06-30 23:50:41 +02:00
ea6d03581b make literal optimisation work again
enable single register block load/store optimisations for x64 aswell
2020-06-16 12:11:20 +02:00
e335a8ca76 first steps in bringing over the JIT refactor/fastmem 2020-06-16 12:11:19 +02:00
fea9f95bba fix inlined IO register access 2020-06-16 12:06:43 +02:00
5a0b568647 allow allocating caller saved registers
currently system-v only
2020-05-09 14:34:52 +02:00
0f53a34551 rewrite JIT memory emulation 2020-05-09 00:45:05 +02:00
bcc4b5c8dd fix regression from last commit
also a small mistake with msr
2020-04-26 23:25:32 +02:00
b0b9ec42e4 don't use param registers for ReadBanked/WriteBanked
should fix linux build
2020-04-26 20:47:36 +02:00
68d552074b compile UMULLs and some fixes 2020-04-26 13:05:17 +02:00
9b98b8816a improve nop handling and proper behaviour for LDM^
fixes dslinux
2020-04-26 13:05:08 +02:00
60650fa82e disable literal optimations in DTCM 2020-04-26 13:05:07 +02:00
386100c053 make literal optimisation more reliable
fixes spanish Pokemon HeartGold
2020-04-26 13:05:06 +02:00
81f38c14be integrate changes from ARM64 backend and more
- better handle LDM/STM in reg alloc
- unify Halted and IRQ in anticipation for branch inlining
- literal optimisations can be disabled in gui
- jit blocks follow simple returns
- fix idle loop detection
- break jit blocks on IRQ (fixes saving in Pokemon White)
2020-04-26 13:05:05 +02:00
aa23f21b8d decrease jit block cache address granularity
fixes Dragon Quest IX
move code with side effects out of assert, fixes release build
(thanks to m4wx for this one)
also remove some leftovers of jit pipelining
2020-04-26 13:05:05 +02:00
a687be9879 new block cache and much more...
- more reliable code invalidation detection
- blocks aren't stopped at any branch, but are being followed
if possible to get larger blocks
- idle loop recognition
- optimised literal loads, load/store cycle counting
 and loads/stores from constant addresses
2020-04-26 13:05:03 +02:00
2ef776883f more fixes for flag optimisation
+ small cycle counting optimisation
2020-04-26 13:05:02 +02:00
3001d9492c abandon pipelining on jit
fixes Golden Sun Dawn
this makes the cpu state incompatible between interpreter and JIT. That's why switching cpu mode requires a restart(not requiring is stupid anyway) and the pipeline is manually filled when making a save state.
2020-04-26 13:04:59 +02:00
5e443e7962 remove unneeded dolphin code, C++11 static_assert 2020-04-26 13:04:57 +02:00
54985be157 jit: LDM/STM keep proper stack alignment 2020-04-26 13:03:08 +02:00
dcf6e1cad2 jit: fix linux 2020-04-26 13:03:01 +02:00
2efab201e9 jit: LDM/STM finally(!) working + MUL, MLA and CLZ 2020-04-26 13:02:59 +02:00
c58fdbd66b jit: branch instructions 2020-04-26 13:02:58 +02:00
ff97211114 jit: thumb block transfer working
also pc and sp relative loads and some refactoring
2020-04-26 13:02:57 +02:00
2c44bf927c JIT: most mem instructions working
+ branching
2020-04-26 13:02:57 +02:00
5f932cdf48 JIT: compilation of word load and store 2020-04-26 13:02:56 +02:00
ff901141e7 jit: correct cycle counting for thumb shift by reg 2020-04-26 13:02:55 +02:00